linux-kernel - Re: [PATCH v2 1/6] dt-bindings: riscv: Add StarFive Dubhe compatibles

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Date:   Wed, 29 Nov 2023 14:45:58 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Sia Jee Heng <jeeheng.sia@...rfivetech.com>
Cc:     kernel@...il.dk, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, krzk@...nel.org,
        conor+dt@...nel.org, paul.walmsley@...ive.com, palmer@...belt.com,
        aou@...s.berkeley.edu, daniel.lezcano@...aro.org,
        tglx@...utronix.de, anup@...infault.org,
        gregkh@...uxfoundation.org, jirislaby@...nel.org,
        michal.simek@....com, michael.zhu@...rfivetech.com,
        drew@...gleboard.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        leyfoon.tan@...rfivetech.com
Subject: Re: [PATCH v2 1/6] dt-bindings: riscv: Add StarFive Dubhe compatibles

On Wed, Nov 29, 2023 at 02:00:38PM +0800, Sia Jee Heng wrote:
> Add new compatible strings for Dubhe-80 and Dubhe-90. These are
> RISC-V cpu core from StarFive Technology and are used in StarFive
> JH8100 SoC.
> 
> Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> index f392e367d673..493972b29a22 100644
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@ -48,6 +48,8 @@ properties:
>                - thead,c906
>                - thead,c910
>                - thead,c920
> +              - starfive,dubhe-80
> +              - starfive,dubhe-90

s goes before t.

Cheers,
Conor.

>            - const: riscv
>        - items:
>            - enum:
> -- 
> 2.34.1
> 

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