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Message-ID: <8fb359da-2d35-4cea-8a62-199fde1d9a29@linaro.org>
Date: Sat, 23 Dec 2023 19:44:30 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Frank Li <Frank.Li@....com>, manivannan.sadhasivam@...aro.org
Cc: bhelgaas@...gle.com, conor+dt@...nel.org, devicetree@...r.kernel.org,
festevam@...il.com, helgaas@...nel.org, hongxing.zhu@....com,
imx@...ts.linux.dev, kernel@...gutronix.de,
krzysztof.kozlowski+dt@...aro.org, kw@...ux.com, l.stach@...gutronix.de,
linux-arm-kernel@...ts.infradead.org, linux-imx@....com,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
lpieralisi@...nel.org, robh@...nel.org, s.hauer@...gutronix.de,
shawnguo@...nel.org
Subject: Re: [PATCH v5 15/16] dt-bindings: imx6q-pcie: Add iMX95 pcie endpoint
compatible string
On 20/12/2023 22:36, Frank Li wrote:
> Add i.MX95 PCIe "fsl,imx95-pcie-ep" compatible string.
> Add reg-name: "atu", "dbi2", "dma" and "serdes".
>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
>
> Notes:
> Change from v1 to v3
> - new patches at v3
>
> .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 52 ++++++++++++++++---
> 1 file changed, 44 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> index ee155ed5f1811..be9ea77ce8548 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> @@ -22,14 +22,7 @@ properties:
> - fsl,imx8mm-pcie-ep
> - fsl,imx8mq-pcie-ep
> - fsl,imx8mp-pcie-ep
> -
> - reg:
> - minItems: 2
> -
> - reg-names:
> - items:
> - - const: dbi
> - - const: addr_space
No, why? Entries should be defined top-level. If you remove them here,
where are they defined (in which schema)?
> + - if:
> + properties:
> + compatible:
> + enum:
> + - fsl,imx95-pcie-ep
> + then:
> + properties:
> + linux,pci-domain: true
Why? It is allowed already.
Best regards,
Krzysztof
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