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Message-Id:
<170498463788.20080.14469126182221973580.git-patchwork-notify@kernel.org>
Date: Thu, 11 Jan 2024 14:50:37 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Conor Dooley <conor@...nel.org>
Cc: linux-riscv@...ts.infradead.org, palmer@...belt.com,
conor.dooley@...rochip.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, paul.walmsley@...ive.com,
aou@...s.berkeley.edu, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] dt-bindings: riscv: permit numbers in "riscv,isa"
Hello:
This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@...osinc.com>:
On Fri, 8 Dec 2023 16:06:51 +0000 you wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> There are some extensions that contain numbers, such as Zve32f, which
> are enabled by the "max" cpu type in QEMU.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>
> [...]
Here is the summary with links:
- [v1] dt-bindings: riscv: permit numbers in "riscv,isa"
https://git.kernel.org/riscv/c/baa04909d100
You are awesome, thank you!
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