lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Fri, 19 Jan 2024 10:38:32 +0000
From: Jose Abreu <Jose.Abreu@...opsys.com>
To: Bernd Edlinger <bernd.edlinger@...mail.de>, Andrew Lunn <andrew@...n.ch>
CC: Alexandre Torgue <alexandre.torgue@...s.st.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-stm32@...md-mailman.stormreply.com" <linux-stm32@...md-mailman.stormreply.com>,
        "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Jiri Pirko <jiri@...dia.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Jose Abreu <Jose.Abreu@...opsys.com>
Subject: RE: [PATCH v2] net: stmmac: Wait a bit for the reset to take effect

From: Bernd Edlinger <bernd.edlinger@...mail.de>
Date: Fri, Jan 19, 2024 at 07:15:31

> On 1/17/24 17:55, Jose Abreu wrote:
> > From: Bernd Edlinger <bernd.edlinger@...mail.de>
> > Date: Wed, Jan 17, 2024 at 16:48:22
> > 
> >> I don't know at all.  And actually, I am more concerned that other registers
> >> might be unreliable within the first microsecond after reset is de-asserted.
> > 
> > Are you guaranteeing that the documented PoR time is achieved before reading registers?
> > 
> 
> Yes, that is the idea, why I added the udelay directly after releasing the reset,
> thus simply delaying the execution of the stmmac_hw_init function, and not directly
> where the synopsys_id register is accessed.

I understand your point, but the delay should be on reset function itself, since it depends
on the SoC that stmmac is integrated.

Please refer to reset_simple_reset(), where usleep_range() is used.

Thanks,
Jose

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ