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Message-ID: <mjkxgytrdzm7gz6jjjbe3tjemussrcqyvz52n4o4cwhdr6y557@h4im5qv4itpc>
Date: Fri, 7 Jun 2024 14:52:30 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Komal Bajaj <quic_kbajaj@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: qdu1000: Add secure qfprom node
On Fri, Jun 07, 2024 at 05:04:45PM +0530, Komal Bajaj wrote:
> Add secure qfprom node and also add properties for multi channel
> DDR. This will be required for LLCC driver to pick the correct
> LLCC configuration.
'will be' or 'is' ?
>
> Signed-off-by: Komal Bajaj <quic_kbajaj@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index 7a77f7a55498..d8df1bab63d5 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -1584,6 +1584,21 @@ system-cache-controller@...00000 {
> reg-names = "llcc0_base",
> "llcc_broadcast_base";
> interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> +
> + nvmem-cell-names = "multi-chan-ddr";
> + nvmem-cells = <&multi_chan_ddr>;
> + };
> +
> + sec_qfprom: efuse@...c8000 {
> + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom";
> + reg = <0 0x221c8000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + multi_chan_ddr: multi-chan-ddr@12b {
> + reg = <0x12b 0x1>;
> + bits = <0 2>;
> + };
> };
> };
>
> --
> 2.42.0
>
--
With best wishes
Dmitry
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