lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Mon, 10 Jun 2024 12:32:34 +0200
From: Jerome Brunet <jbrunet@...libre.com>
To: neil.armstrong@...aro.org, mturquette@...libre.com, sboyd@...nel.org, 
 robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, khilman@...libre.com, 
 martin.blumenstingl@...glemail.com, 
 Dmitry Rokosov <ddrokosov@...utedevices.com>
Cc: jian.hu@...ogic.com, kernel@...rdevices.ru, rockosov@...il.com, 
 linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org
Subject: Re: (subset) [PATCH v3 0/7] clk: meson: introduce Amlogic A1 SoC
 Family CPU clock controller driver

Applied to clk-meson (v6.11/drivers), thanks!

[1/7] clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL
      https://github.com/BayLibre/clk-meson/commit/d4c83ac16c65
[2/7] dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
      https://github.com/BayLibre/clk-meson/commit/96f3b9787363
[4/7] dt-bindings: clock: meson: a1: peripherals: support sys_pll input
      https://github.com/BayLibre/clk-meson/commit/41056416ed53

Best regards,
--
Jerome


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ