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Message-Id: <98031697-93AE-43AC-B192-44B12CB43EC5@jrtc27.com>
Date: Wed, 12 Jun 2024 16:24:44 +0100
From: Jessica Clarke <jrtc27@...c27.com>
To: Minda Chen <minda.chen@...rfivetech.com>
Cc: Conor Dooley <conor@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v1] riscv: dts: starfive: add PCIe dts configuration for
JH7110
On 11 Jun 2024, at 02:52, Minda Chen <minda.chen@...rfivetech.com> wrote:
>
> Add PCIe dts configuraion for JH7110 SoC platform.
>
> Signed-off-by: Minda Chen <minda.chen@...rfivetech.com>
> Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
> .../boot/dts/starfive/jh7110-common.dtsi | 64 ++++++++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 86 +++++++++++++++++++
> 2 files changed, 150 insertions(+)
Is there a corresponding YAML schema?
Jess
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