linux-kernel - Re: [PATCH v4 3/8] serial: qcom-geni: Fix the timeout in qcom_geni_serial_poll

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Date: Mon, 17 Jun 2024 20:46:04 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Douglas Anderson <dianders@...omium.org>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Jiri Slaby <jirislaby@...nel.org>
Cc: Yicong Yang <yangyicong@...ilicon.com>, Tony Lindgren <tony@...mide.com>,
 Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
 Johan Hovold <johan+linaro@...nel.org>,
 John Ogness <john.ogness@...utronix.de>, linux-arm-msm@...r.kernel.org,
 Bjorn Andersson <andersson@...nel.org>,
 Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
 Stephen Boyd <swboyd@...omium.org>, linux-serial@...r.kernel.org,
 linux-kernel@...r.kernel.org,
 Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
 Vijaya Krishna Nivarthi <quic_vnivarth@...cinc.com>
Subject: Re: [PATCH v4 3/8] serial: qcom-geni: Fix the timeout in
 qcom_geni_serial_poll_bit()



On 6/11/24 00:24, Douglas Anderson wrote:
> The qcom_geni_serial_poll_bit() is supposed to be able to be used to
> poll a bit that's will become set when a TX transfer finishes. Because
> of this it tries to set its timeout based on how long the UART will
> take to shift out all of the queued bytes. There are two problems
> here:
> 1. There appears to be a hidden extra word on the firmware side which
>     is the word that the firmware has already taken out of the FIFO and
>     is currently shifting out. We need to account for this.
> 2. The timeout calculation was assuming that it would only need 8 bits
>     on the wire to shift out 1 byte. This isn't true. Typically 10 bits
>     are used (8 data bits, 1 start and 1 stop bit), but as much as 13
>     bits could be used (14 if we allowed 9 bits per byte, which we
>     don't).
> 
> The too-short timeout was seen causing problems in a future patch
> which more properly waited for bytes to transfer out of the UART
> before cancelling.
> 
> Rather than fix the calculation, replace it with the core-provided
> uart_fifo_timeout() function.
> 
> NOTE: during earlycon, uart_fifo_timeout() has the same limitations
> about not being able to figure out the exact timeout that the old
> function did. Luckily uart_fifo_timeout() returns the same default
> timeout of 20ms in this case. We'll add a comment about it, though, to
> make it more obvious what's happening.
> 
> Fixes: c4f528795d1a ("tty: serial: msm_geni_serial: Add serial driver support for GENI based QUP")
> Suggested-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---

Acked-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Konrad