[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <8b10fa58-4375-4738-9f7b-3299aeb00d36@linaro.org>
Date: Tue, 16 Jul 2024 14:27:36 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Konrad Dybcio <konrad.dybcio@...aro.org>,
Taniya Das <quic_tdas@...cinc.com>, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/3] clk: qcom: dispcc-sm8650: Park RCG's clk source at
XO during disable
On 16/07/2024 13:40, Dmitry Baryshkov wrote:
> On Tue, Jul 16, 2024 at 11:05:21AM GMT, Neil Armstrong wrote:
>> The RCG's clk src has to be parked at XO while disabling as per the
>> HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
>>
>> It also changes dptx1_aux_clk_src to use the correct ops instead of
>> clk_dp_ops.
>>
>> Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver")
>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
>> ---
>> drivers/clk/qcom/dispcc-sm8650.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8650.c
>> index c9d2751f5cb8..80fe25afccf7 100644
>> --- a/drivers/clk/qcom/dispcc-sm8650.c
>> +++ b/drivers/clk/qcom/dispcc-sm8650.c
>> @@ -398,7 +398,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = {
>> .parent_data = disp_cc_parent_data_0,
>> .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
>> .flags = CLK_SET_RATE_PARENT,
>> - .ops = &clk_dp_ops,
>> + .ops = &clk_rcg2_ops,
>
> Should this also be clk_rcg2_shared_ops ?
Nop, the only parent is tcxo
>
>> },
>> };
>>
>> @@ -560,7 +560,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = {
>> .parent_data = disp_cc_parent_data_5,
>> .num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
>> .flags = CLK_SET_RATE_PARENT,
>> - .ops = &clk_rcg2_ops,
>> + .ops = &clk_rcg2_shared_ops,
>> },
>> };
>>
>> @@ -575,7 +575,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = {
>> .parent_data = disp_cc_parent_data_5,
>> .num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
>> .flags = CLK_SET_RATE_PARENT,
>> - .ops = &clk_rcg2_ops,
>> + .ops = &clk_rcg2_shared_ops,
>> },
>> };
>>
>>
>> --
>> 2.34.1
>>
>
Powered by blists - more mailing lists