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Message-ID: <9f3e5fa4-0973-45de-98aa-806af8981414@collabora.com>
Date: Mon, 29 Jul 2024 09:46:41 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Arseniy Velikanov <me@...merle.xyz>, mturquette@...libre.com,
sboyd@...nel.org, matthias.bgg@...il.com, sean.wang@...nel.org,
linus.walleij@...aro.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, frank.li@...o.com, jiasheng@...as.ac.cn,
mars.cheng@...iatek.com, owen.chen@...iatek.com, macpaul.lin@...iatek.com,
zh.chen@...iatek.com, argus.lin@...iatek.com
Cc: linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/5] clk: mediatek: mt6765: Add missing PMIC clock
Il 29/07/24 09:34, Arseniy Velikanov ha scritto:
> Add PWRAP gate
>
> Fixes: 1aca9939bf72 ("clk: mediatek: Add MT6765 clock support")
> Signed-off-by: Arseniy Velikanov <me@...merle.xyz>
Agreed, but please remove the fixes tag and add a better commit description.
Something like...
Add the missing PWRAP gate clock, used for communicating with the PMIC through
the PMIC Wrapper hardware.
Cheers,
Angelo
> ---
> drivers/clk/mediatek/clk-mt6765.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/mediatek/clk-mt6765.c b/drivers/clk/mediatek/clk-mt6765.c
> index d53731e7933f..4f03a0df4ff0 100644
> --- a/drivers/clk/mediatek/clk-mt6765.c
> +++ b/drivers/clk/mediatek/clk-mt6765.c
> @@ -559,6 +559,7 @@ static const struct mtk_gate ifr_clks[] = {
> /* INFRA_TOPAXI */
> /* INFRA PERI */
> /* INFRA mode 0 */
> + GATE_IFR2(CLK_IFR_PMIC_AP, "ifr_pmic_ap", "axi_ck", 1),
> GATE_IFR2(CLK_IFR_ICUSB, "ifr_icusb", "axi_ck", 8),
> GATE_IFR2(CLK_IFR_GCE, "ifr_gce", "axi_ck", 9),
> GATE_IFR2(CLK_IFR_THERM, "ifr_therm", "axi_ck", 10),
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