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Message-ID: <idvuqeb3oqocvlzl5uylsqjg3b4kmrxmpe26bupq76rdffis4y@eq5yep4kgzjh>
Date: Wed, 21 Aug 2024 10:34:11 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Luo Jie <quic_luoj@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, quic_kkumarcs@...cinc.com, quic_suruchia@...cinc.com,
quic_pavir@...cinc.com, quic_linchen@...cinc.com, quic_leiwei@...cinc.com,
bartosz.golaszewski@...aro.org, srinivas.kandagatla@...aro.org
Subject: Re: [PATCH v2 3/4] arm64: defconfig: Enable Qualcomm IPQ CMN PLL
clock controller
On Tue, Aug 20, 2024 at 10:02:44PM +0800, Luo Jie wrote:
> The CMN PLL hardware block is available in the Qualcomm IPQ SoC such
> as IPQ9574 and IPQ5332. It provides fixed rate output clocks to Ethernet
> related hardware blocks such as external Ethernet PHY or switch. This
> driver is initially being enabled for IPQ9574. All boards based on
> IPQ9574 SoC will require to include this driver in the build.
>
> This CMN PLL hardware block does not provide any other specific function
> on the IPQ SoC other than enabling output clocks to Ethernet related
> devices.
>
> Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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