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Message-ID: <f7f30cbc-1bae-440e-b6e5-d50f2deb8847@timsurber.de>
Date: Fri, 30 Aug 2024 19:57:36 +0200
From: Tim Surber <me@...surber.de>
To: Jianfeng Liu <liujianfeng1994@...il.com>,
linux-rockchip@...ts.infradead.org
Cc: Diederik de Haas <didi.debian@...ow.org>,
Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>,
Stephen Rothwell <sfr@...b.auug.org.au>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add RGA2 support to rk3588
Hi Jianfeng,
I've tested RGA2 now for a while on a RK3588 board and it works correctly.
Of course it has to be updated and moved to probably rk3588-base.dtsi now.
With this done:
Tested-by: Tim Surber <me@...surber.de>
Best regards,
Tim Surber
On 04.06.24 18:34, Jianfeng Liu wrote:
> RK3588 also features a RGA2 block. Add the necessary device tree
> node.
>
> Signed-off-by: Jianfeng Liu <liujianfeng1994@...il.com>
>
> ---
>
> Changes in v2:
> - Sort node by bus-address based on next-20240604
>
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 6ac5ac8b48a..beebc4dc0e7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -1159,6 +1159,17 @@ power-domain@...588_PD_SDMMC {
> };
> };
>
> + rga: rga@...80000 {
> + compatible = "rockchip,rk3588-rga", "rockchip,rk3288-rga";
> + reg = <0x0 0xfdb80000 0x0 0x180>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&cru ACLK_RGA2>, <&cru HCLK_RGA2>, <&cru CLK_RGA2_CORE>;
> + clock-names = "aclk", "hclk", "sclk";
> + resets = <&cru SRST_RGA2_CORE>, <&cru SRST_A_RGA2>, <&cru SRST_H_RGA2>;
> + reset-names = "core", "axi", "ahb";
> + power-domains = <&power RK3588_PD_VDPU>;
> + };
> +
> av1d: video-codec@...70000 {
> compatible = "rockchip,rk3588-av1-vpu";
> reg = <0x0 0xfdc70000 0x0 0x800>;
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