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Message-ID: <ZuPNmOLJPJsPlufA@intel.com>
Date: Fri, 13 Sep 2024 13:28:56 +0800
From: Chao Gao <chao.gao@...el.com>
To: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
CC: Jon Kohler <jon@...anix.com>, Thomas Gleixner <tglx@...utronix.de>,
	Borislav Petkov <bp@...en8.de>, Peter Zijlstra <peterz@...radead.org>, "Josh
 Poimboeuf" <jpoimboe@...nel.org>, Ingo Molnar <mingo@...hat.com>, Dave Hansen
	<dave.hansen@...ux.intel.com>, X86 ML <x86@...nel.org>, "H. Peter Anvin"
	<hpa@...or.com>, LKML <linux-kernel@...r.kernel.org>, "kvm @ vger . kernel .
 org" <kvm@...r.kernel.org>
Subject: Re: [PATCH] x86/bhi: avoid hardware mitigation for
 'spectre_bhi=vmexit'

On Thu, Sep 12, 2024 at 09:24:40AM -0700, Pawan Gupta wrote:
>On Thu, Sep 12, 2024 at 03:44:38PM +0000, Jon Kohler wrote:
>> > It is only worth implementing the long sequence in VMEXIT_ONLY mode if it is
>> > significantly better than toggling the MSR.
>> 
>> Thanks for the pointer! I hadn’t seen that second sequence. I’ll do measurements on
>> three cases and come back with data from an SPR system.
>> 1. as-is (wrmsr on entry and exit)
>> 2. Short sequence (as a baseline)
>> 3. Long sequence
>
>I wonder if virtual SPEC_CTRL feature introduced in below series can
>provide speedup, as it can replace the MSR toggling with faster VMCS
>operations:

"virtual SPEC_CTRL" won't provide speedup. the wrmsr on entry/exit is still
need if guest's (effective) value and host's value are different.

"virtual SPEC_CTRL" just prevents guests from toggling some bits. It doesn't
switch the MSR between guest value and host value on entry/exit. so, KVM has
to do the switching with wrmsr/rdmsr instructions. A new feature, "load
IA32_SPEC_CTRL" VMX control (refer to Chapter 15 in ISE spec[*]), can help but
it isn't supported on SPR.

[*]: https://cdrdv2.intel.com/v1/dl/getContent/671368

>
>  https://lore.kernel.org/kvm/20240410143446.797262-1-chao.gao@intel.com/
>
>Adding Chao for their opinion.

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