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Message-ID: <CAC=S1nj6AdVHoBUJsduHiGfpRRijTx+zJ5e=a30+pYENqO-GOw@mail.gmail.com>
Date: Mon, 23 Sep 2024 18:05:10 +0800
From: Fei Shao <fshao@...omium.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: linux-pci@...r.kernel.org, ryder.lee@...iatek.com, 
	jianjun.wang@...iatek.com, lpieralisi@...nel.org, kw@...ux.com, 
	robh@...nel.org, bhelgaas@...gle.com, matthias.bgg@...il.com, 
	linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, kernel@...labora.com
Subject: Re: [PATCH v3 1/2] PCI: mediatek-gen3: Add support for setting
 max-link-speed limit

Hi Angelo,

On Wed, Sep 18, 2024 at 4:13 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
>
> Add support for respecting the max-link-speed devicetree property,
> forcing a maximum speed (Gen) for a PCI-Express port.
>
> Since the MediaTek PCIe Gen3 controllers also expose the maximum
> supported link speed in the PCIE_BASE_CFG register, if property
> max-link-speed is specified in devicetree, validate it against the
> controller capabilities and proceed setting the limitations only
> if the wanted Gen is lower than the maximum one that is supported
> by the controller itself (otherwise it makes no sense!).
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

I confirmed that v3 addressed all my comments in v2 (with some in a
more sensible approach), so
Reviewed-by: Fei Shao <fshao@...omium.org>

Regards,
Fei

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