linux-kernel - Re: [PATCH 1/1] nvme-pci: Add CPU latency pm-qos handling

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Message-ID: <913b063d0638614bc95d92969879d2096ffc0722.camel@linux.intel.com>
Date: Wed, 09 Oct 2024 09:45:07 +0300
From: Tero Kristo <tero.kristo@...ux.intel.com>
To: Christoph Hellwig <hch@....de>
Cc: linux-kernel@...r.kernel.org, axboe@...nel.dk, 
	linux-nvme@...ts.infradead.org, sagi@...mberg.me, kbusch@...nel.org
Subject: Re: [PATCH 1/1] nvme-pci: Add CPU latency pm-qos handling

On Mon, 2024-10-07 at 08:19 +0200, Christoph Hellwig wrote:
> > @@ -483,6 +498,27 @@ static inline void nvme_write_sq_db(struct
> > nvme_queue *nvmeq, bool write_sq)
> >  			nvmeq->dbbuf_sq_db, nvmeq->dbbuf_sq_ei))
> >  		writel(nvmeq->sq_tail, nvmeq->q_db);
> >  	nvmeq->last_sq_tail = nvmeq->sq_tail;
> > +
> > +	/* Kick CPU latency while updating queue. */
> > +	dev = nvmeq->dev;
> > +	if (!dev || dev->cpu_latency < 0)
> > +		return;
> > +
> > +	for_each_cpu(cpu, nvmeq->irq_aff_mask) {
> 
> Doing something as complex as this for every doorbell write is not
> going to fly.
> 
> Even if it was I see nothing nvme-specific in the interface.
> 
> So please figure out a way to make things cheap in the I/O path
> and move code to the right layers.

Initially, I posted the patch against block layer, but there the
recommendation was to move this closer to the HW; i.e. NVMe driver
level.

See:
https://patchwork.kernel.org/project/linux-block/patch/20240829075423.1345042-2-tero.kristo@linux.intel.com/

Any tips where this piece of code should actually be moved would be
appreciated.

-Tero

> 
> Also please avoid all these overly long lines.