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Message-ID: <20241021174519.GIZxaTL7o85C_w2ucR@fat_crate.local>
Date: Mon, 21 Oct 2024 19:45:19 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Luck, Tony" <tony.luck@...el.com>
Cc: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>,
"daniel.sneddon@...ux.intel.com" <daniel.sneddon@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"linux-perf-users@...r.kernel.org" <linux-perf-users@...r.kernel.org>,
Josh Poimboeuf <jpoimboe@...nel.org>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
"Liang, Kan" <kan.liang@...ux.intel.com>,
"andrew.cooper3@...rix.com" <andrew.cooper3@...rix.com>,
Brice Goglin <brice.goglin@...il.com>,
Mario Limonciello <mario.limonciello@....com>,
Perry Yuan <Perry.Yuan@....com>,
Dapeng Mi <dapeng1.mi@...ux.intel.com>
Subject: Re: [PATCH v4 02/10] x86/cpu/topology: Add CPU type to struct
cpuinfo_topology
On Mon, Oct 21, 2024 at 05:13:41PM +0000, Luck, Tony wrote:
> Example from <asm/intel-family.h>
>
> #define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */
>
> #define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */
>
> The native model number could be helpful to tell what each of your P-cores and E-cores
> are based on. Could be useful when the same base core is used in more than one SoC
> generation.
How am I supposed to read this?
Gracemont is the "native", base core and from that they do a Golden Cove and
a Raptor Cove?
What does that have to do with the P- and E-cores? Are those above two
different types wrt performance?
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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