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Message-ID: <42d59ea5-5b36-49cd-b04a-4480064fff02@intel.com>
Date: Mon, 21 Oct 2024 15:57:18 -0700
From: Sohil Mehta <sohil.mehta@...el.com>
To: "Luck, Tony" <tony.luck@...el.com>, "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
CC: "bp@...en8.de" <bp@...en8.de>, "tglx@...utronix.de" <tglx@...utronix.de>,
	"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
	"mingo@...hat.com" <mingo@...hat.com>, "hpa@...or.com" <hpa@...or.com>,
	"x86@...nel.org" <x86@...nel.org>, "linux-edac@...r.kernel.org"
	<linux-edac@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 06/10] x86/mce: Convert multiple if () statements into
 a switch() statement

On 10/21/2024 11:40 AM, Luck, Tony wrote:
>>> Intel model number allocation policies aren't necessarily sequential.
>>
>> Model numbers are assumed to be sequential at least within family 6.
> 
> Assumption can only be applied retroactively to simpler times.  Looking
> at the timelines and model numbers for pure-Atom, pure-Core, Hybrid,
> and Xeon, they are somewhat jumbled.
> 

Agreed. Using range checks within a family with extreme care and
avoiding cross-family ones seems like the saner thing to do.

Maybe everything in the future is enumerated and VFM checks would not be
needed :)

Trying to understand more, I have more questions than answers. With the
introduction of Family 0x19, do we need to reevaluate some of the
existing model checks?

early_init_intel():
if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
    (c->x86 == 0x6 && c->x86_model >= 0x0e))
	set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

It seems "constant_tsc" wouldn't show on Diamond rapids. Do we need it to?

> Qiuxu starts the function with:
> 
> +       /* Older CPUs don't need quirks. */
> +       if (c->x86 < 6)
> +               return;
> 
> So Quark leaves the function early.
> 

Ah! My bad, I missed that.

> -Tony
> 
> 	


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