linux-kernel - RE: [PATCH v7 3/5] x86/mce, EDAC/mce_amd: Add support for new MCA

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CY8PR11MB7134F53B2F25A5E0EB031C6E894E2@CY8PR11MB7134.namprd11.prod.outlook.com>
Date: Thu, 24 Oct 2024 02:25:39 +0000
From: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
To: Avadhut Naik <avadhut.naik@....com>, "x86@...nel.org" <x86@...nel.org>,
	"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
	"linux-trace-kernel@...r.kernel.org" <linux-trace-kernel@...r.kernel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"bp@...en8.de" <bp@...en8.de>, "Luck, Tony" <tony.luck@...el.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>, "mingo@...hat.com"
	<mingo@...hat.com>, "rostedt@...dmis.org" <rostedt@...dmis.org>,
	"mchehab@...nel.org" <mchehab@...nel.org>, "yazen.ghannam@....com"
	<yazen.ghannam@....com>, "john.allen@....com" <john.allen@....com>
Subject: RE: [PATCH v7 3/5] x86/mce, EDAC/mce_amd: Add support for new
 MCA_SYND{1,2} registers

> From: Avadhut Naik <avadhut.naik@....com>
> [...]
> Subject: [PATCH v7 3/5] x86/mce, EDAC/mce_amd: Add support for new
> MCA_SYND{1,2} registers
> 
> Starting with Zen4, AMD's Scalable MCA systems incorporate two new
> registers: MCA_SYND1 and MCA_SYND2.
> 
> These registers will include supplemental error information in addition to the
> existing MCA_SYND register. The data within these registers is considered valid
> if MCA_STATUS[SyndV] is set.
> 
> Userspace error decoding tools like the rasdaemon gather related hardware
> error information through the tracepoints. As such, these two registers should
> be exported through the mce_record tracepoint so that tools like rasdaemon
> can parse them and output the supplemental error information like FRU Text
> contained in them.
> 
> [Yazen: Drop Yazen's Co-developed-by tag and moved SoB tag.]
> 
> Signed-off-by: Avadhut Naik <avadhut.naik@....com>
> Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
> Signed-off-by: Avadhut Naik <avadhut.naik@....com>
> ---
> Changes in v2:
> [1] https://lore.kernel.org/linux-edac/20240521125434.1555845-1-
> yazen.ghannam@....com/
> [2] https://lore.kernel.org/linux-edac/20240523155641.2805411-1-
> yazen.ghannam@....com/
> 
> 1. Drop dependencies on sets [1] and [2] above and rebase on top of
> tip/master.
> 
> Changes in v3:
> 1. Move wrapper changes required in mce_read_aux() and
> mce_no_way_out() from this patch to the first patch.
> 2. Add comments to explain the new wrapper's purpose.
> 3. Modify commit message per feedback received.
> 4. Fix SoB chain to properly reflect the patch path.
> 
> Changes in v4:
> 1. Rebase on top of tip/master to avoid merge conflicts.
> 
> Changes in v5:
> 1. Remove "len" field since the length of a dynamic array can be fetched from
> its metadata.
> 2. Substitute __print_array() with __print_dynamic_array().
> 
> Changes in v6:
> 1. Rebase on top of tip/master.
> 2. Use the newly introduced to_mce_hw_err macro in amd_decode_mce().
> 
> Changes in v7:
> 1. Rebase on top of tip/master.
> 2. Change second parameter of __print_dynamic_array from 8 to sizeof(u8)
> to ensure that the dynamic array is parsed using a u8 pointer instead of
> u64 pointer.

As my comments resolved in v6 and v7,

    Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>

- Qiuxu