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Message-ID: <99fe47e0-c4bb-4a25-86e1-513d79835c8c@sirena.org.uk>
Date: Thu, 24 Oct 2024 12:19:39 +0100
From: Mark Brown <broonie@...nel.org>
To: Stefan Kerkmann <s.kerkmann@...gutronix.de>
Cc: Linux regressions mailing list <regressions@...ts.linux.dev>,
	Dhruva Gole <d-gole@...com>, Yoshitaka Ikeda <ikeda@...int.co.jp>,
	linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
	kernel-team@...gutronix.de
Subject: Re: [REGRESSION] spi: cadence-quadspi: STIG mode results in timeouts
 for Micron MT25QL01 flash

On Thu, Oct 24, 2024 at 09:12:11AM +0200, Stefan Kerkmann wrote:
> On 22.10.24 18:39, Mark Brown wrote:

> > Given the description of the original commit I'd expect so.  My guess
> > would be that this is either tuning of the lengths involved or a quirk
> > that's needed to disable STIG on some devices.

> Adding a quirk came to my mind as well. I unfortunately do not have a different
> QSPI chip to test against to see if it is a specific combination of peripheral
> and chip  or if using STIG is generally broken on the socfpga. With trying

I guess if you do a very tightly defined quirk initially then it'll be
fixed for the systems we definitely know have problems and we can always
apply it to more systems later if we discover that it's a more
widespread issue.

> different lenghts do you refeer to `CQSPI_STIG_DATA_LEN_MAX`?

Yes.

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