linux-kernel - Re: [PATCH 08/11] clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver

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Message-ID: <2aa768a4-b0e9-4b2f-8d74-736a88cf81cd@quicinc.com>
Date: Wed, 30 Oct 2024 23:33:39 +0530
From: Taniya Das <quic_tdas@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette
	<mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Abhishek Sahu
	<absahu@...eaurora.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Catalin Marinas
	<catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, Ajit Pandey
	<quic_ajipan@...cinc.com>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        "Jagadeesh Kona" <quic_jkona@...cinc.com>,
        Stephen Boyd
	<sboyd@...eaurora.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 08/11] clk: qcom: gpucc-qcs615: Add QCS615 graphics clock
 controller driver



On 10/19/2024 1:58 AM, Dmitry Baryshkov wrote:
>> +static struct gdsc gx_gdsc = {
>> +	.gdscr = 0x100c,
>> +	.en_rest_wait_val = 0x2,
>> +	.en_few_wait_val = 0x2,
>> +	.clk_dis_wait_val = 0x2,
>> +	.pd = {
>> +		.name = "gx_gdsc",
> .power_on = gdsc_gx_do_nothing_enable ? Or is it controlled directly on
> this platform?
> 

On QCS615 the GPU clocks are directly controlled by high level OS.

>> +	},
>> +	.pwrsts = PWRSTS_OFF_ON,
>> +	.flags = POLL_CFG_GDSCR,
>> +};
>> +

-- 
Thanks & Regards,
Taniya Das.