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Message-ID: <61b200ef-891c-4c8b-9d57-fcc064f52ab1@oss.nxp.com>
Date: Mon, 4 Nov 2024 13:44:53 +0200
From: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Linus Walleij <linus.walleij@...aro.org>,
 Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Chester Lin <chester62515@...il.com>,
 Matthias Brugger <mbrugger@...e.com>,
 Ghennadi Procopciuc <Ghennadi.Procopciuc@....com>,
 Larisa Grigore <larisa.grigore@....com>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 "Rafael J. Wysocki" <rafael@...nel.org>, Lee Jones <lee@...nel.org>,
 Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
 Fabio Estevam <festevam@...il.com>, Dong Aisheng <aisheng.dong@....com>,
 Jacky Bai <ping.bai@....com>, linux-gpio@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, NXP S32 Linux Team <s32@....com>,
 Christophe Lizzi <clizzi@...hat.com>, Alberto Ruiz <aruizrui@...hat.com>,
 Enric Balletbo <eballetb@...hat.com>,
 Pengutronix Kernel Team <kernel@...gutronix.de>, imx@...ts.linux.dev
Subject: Re: [PATCH v5 4/7] pinctrl: s32: convert the driver into an mfd cell

Hi Krzysztof,

On 02/11/2024 10:51, Krzysztof Kozlowski wrote:
> On Fri, Nov 01, 2024 at 10:06:10AM +0200, Andrei Stefanescu wrote:
>> +	/* Order is MSCR regions first, then IMCR ones */
>>  	for (i = 0; i < mem_regions; i++) {
>> -		base = devm_platform_get_and_ioremap_resource(pdev, i, &res);
>> -		if (IS_ERR(base))
>> -			return PTR_ERR(base);
>> -
>> -		snprintf(ipctl->regions[i].name,
>> -			 sizeof(ipctl->regions[i].name), "map%u", i);
>> -
>> -		s32_regmap_config.name = ipctl->regions[i].name;
>> -		s32_regmap_config.max_register = resource_size(res) -
>> -						 s32_regmap_config.reg_stride;
>> -
>> -		map = devm_regmap_init_mmio(&pdev->dev, base,
>> -						&s32_regmap_config);
>> -		if (IS_ERR(map)) {
>> -			dev_err(&pdev->dev, "Failed to init regmap[%u]\n", i);
>> -			return PTR_ERR(map);
>> -		}
>> -
>> -		ipctl->regions[i].map = map;
>> +		regmap_type = i < mem_regions / 2 ? SIUL2_MSCR : SIUL2_IMCR;
>> +		j = i % mfd->num_siul2;
>> +		ipctl->regions[i].map = mfd->siul2[j].regmaps[regmap_type];
>>  		ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i];
> 
> This looks like breaking all the users. Nothing in commit msg about
> this: about rationale, impact or backwards compatibility.
> 
> Nothing in changelog in cover letter explaining such sudden change in
> approach.
> 
> Sorry, that's a NAK.

I will add a detailed explanation for the change in v6. I changed the existing
implementation because of feedback received in this series and in [0]. The SIUL2
module has the pinctrl&GPIO functionality tightly coupled, which required us to
carve out the registers between GPIO & pinctrl and it resulted in a long and detailed
list.

Also, in the future, we will also have some nvmem cells exported which are part
of SIUL2.

Best regards,
Andrei

[0] - https://lore.kernel.org/linux-gpio/20241002135920.3647322-1-andrei.stefanescu@oss.nxp.com/

> 
> Best regards,
> Krzysztof
> 


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