linux-kernel - Re: [PATCH v2] ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <35a05978-a83f-4746-92cd-108b6586ac08@denx.de>
Date: Wed, 6 Nov 2024 01:30:29 +0100
From: Marek Vasut <marex@...x.de>
To: Alexandre TORGUE <alexandre.torgue@...s.st.com>,
 linux-arm-kernel@...ts.infradead.org
Cc: Christoph Niedermaier <cniedermaier@...electronics.com>,
 Conor Dooley <conor+dt@...nel.org>, Krzysztof Kozlowski
 <krzk+dt@...nel.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>,
 Rob Herring <robh@...nel.org>, devicetree@...r.kernel.org,
 kernel@...electronics.com, linux-kernel@...r.kernel.org,
 linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH v2] ARM: dts: stm32: Describe M24256E write-lockable page
 in DH STM32MP13xx DHCOR SoM DT

On 10/29/24 4:28 PM, Alexandre TORGUE wrote:
> Hi Marek
> 
> On 10/17/24 21:09, Marek Vasut wrote:
>> The STM32MP13xx DHCOR SoM is populated with M24256E EEPROM which has
>> Additional Write lockable page at separate I2C address. Describe the
>> page in DT to make it available.
>>
>> Note that the WLP page on this device is hardware write-protected by
>> R37 which pulls the nWC signal high to VDD_3V3_1V8 power rail.
>>
>> Signed-off-by: Marek Vasut <marex@...x.de>
>> ---
>> Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>
>> Cc: Christoph Niedermaier <cniedermaier@...electronics.com>
>> Cc: Conor Dooley <conor+dt@...nel.org>
>> Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
>> Cc: Maxime Coquelin <mcoquelin.stm32@...il.com>
>> Cc: Rob Herring <robh@...nel.org>
>> Cc: devicetree@...r.kernel.org
>> Cc: kernel@...electronics.com
>> Cc: linux-arm-kernel@...ts.infradead.org
>> Cc: linux-kernel@...r.kernel.org
>> Cc: linux-stm32@...md-mailman.stormreply.com
>> ---
>> V2: Fix up the M25256E in Subject
>> ---
>> DEPENDS:
>> - https://lore.kernel.org/linux-i2c/20241017184152.128395-1- 
>> marex@...x.de/
>> - https://lore.kernel.org/linux-i2c/20241017184152.128395-2- 
>> marex@...x.de/
>> ---
>>   arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/ 
>> arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
>> index 5c633ed548f37..07133bd82efa6 100644
>> --- a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
>> +++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
>> @@ -202,6 +202,12 @@ eeprom0: eeprom@50 {
>>           pagesize = <64>;
>>       };
>> +    eeprom0wl: eeprom@58 {
>> +        compatible = "st,24256e-wl";    /* ST M24256E WL page of 0x50 */
>> +        pagesize = <64>;
>> +        reg = <0x58>;
>> +    };
>> +
> 
> You could have sorted nodes by I2C addresses.
Fixed in [PATCH] ARM: dts: stm32: Sort M24256E write-lockable page in DH 
STM32MP13xx DHCOR SoM DT

Sorry.

(I also wrote me a sorting tool in the meantime, but it still isn't too 
good)