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Message-ID: <fccedc26-0bb9-4078-8a94-4199f6b383c1@kernel.org>
Date: Thu, 9 Jan 2025 18:35:18 +0200
From: Roger Quadros <rogerq@...nel.org>
To: Siddharth Vadapalli <s-vadapalli@...com>, vkoul@...nel.org,
 kishon@...nel.org, sjakhade@...ence.com, thomas.richard@...tlin.com,
 christophe.jaillet@...adoo.fr, u.kleine-koenig@...libre.com,
 eballetb@...hat.com
Cc: linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, srk@...com
Subject: Re: [PATCH v3 1/2] phy: cadence-torrent: Add PCIe multilink
 configuration for 100 MHz refclk



On 09/01/2025 14:16, Siddharth Vadapalli wrote:
> From: Swapnil Jakhade <sjakhade@...ence.com>
> 
> Add register sequences to support PCIe multilink configuration for 100MHz
> reference clock. Maximum two PCIe links are supported.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>

Reviewed-by: Roger Quadros <rogerq@...nel.org>


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