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Message-ID: <4c6dba11-91c6-4251-9153-6461a4da42e7@kernel.org>
Date: Thu, 9 Jan 2025 18:37:29 +0200
From: Roger Quadros <rogerq@...nel.org>
To: Siddharth Vadapalli <s-vadapalli@...com>, vkoul@...nel.org,
kishon@...nel.org, sjakhade@...ence.com, thomas.richard@...tlin.com,
christophe.jaillet@...adoo.fr, u.kleine-koenig@...libre.com,
eballetb@...hat.com
Cc: linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, srk@...com
Subject: Re: [PATCH v3 2/2] phy: cadence-torrent: Add PCIe multilink + USB
with same SSC register config for 100 MHz refclk
On 09/01/2025 14:16, Siddharth Vadapalli wrote:
> From: Swapnil Jakhade <sjakhade@...ence.com>
>
> Add register sequences and support for PCIe multilink + USB configuration
> for 100MHz reference clock. The same SSC is used for both PCIe and USB.
>
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>
> Co-developed-by: Siddharth Vadapalli <s-vadapalli@...com>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
Reviewed-by: Roger Quadros <rogerq@...nel.org>
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