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Message-ID: <de564e46-4a6e-4393-b754-34b35bae5599@quicinc.com>
Date: Wed, 15 Jan 2025 11:40:05 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: Varadarajan Narayanan <quic_varada@...cinc.com>
CC: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
<manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <vkoul@...nel.org>,
<kishon@...nel.org>, <andersson@...nel.org>, <konradybcio@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-phy@...ts.infradead.org>, <quic_srichara@...cinc.com>
Subject: Re: [PATCH 4/4] arm64: dts: qcom: ipq5424: Enable PCIe PHYs and
controllers
On 1/3/2025 12:22 PM, Varadarajan Narayanan wrote:
> On Fri, Dec 13, 2024 at 07:19:50PM +0530, Manikanta Mylavarapu wrote:
>
> [ . . . ]
>
>> +&pcie2_phy {
>> + status = "okay";
>> +};
>> +
>> +&pcie2 {
>> + pinctrl-0 = <&pcie2_default_state>;
>> + pinctrl-names = "default";
>> +
>> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>> +};
>
> pcie2 should come before pcie2_phy
>
Okay, i will update in the next version.
>> +
>> +&pcie3_phy {
>> + status = "okay";
>> +};
>> +
>> +&pcie3 {
>> + pinctrl-0 = <&pcie3_default_state>;
>> + pinctrl-names = "default";
>> +
>> + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>> +};
>
> same here.
Okay, i will update in the next version.
Thanks & Regards,
Manikanta.
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