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Message-Id: <20250216014510.3990613-3-krishna.chundru@oss.qualcomm.com>
Date: Sun, 16 Feb 2025 07:15:10 +0530
From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
To: andersson@...nel.org, robh@...nel.org, dmitry.baryshkov@...aro.org,
manivannan.sadhasivam@...aro.org, krzk@...nel.org, helgaas@...nel.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
lpieralisi@...nel.org, kw@...ux.com, conor+dt@...nel.org,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree-spec@...r.kernel.org, quic_vbadigan@...cinc.com,
Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Subject: [PATCH V3 2/2] schemas: pci: bridge: Document PCIe N_FTS
Per PCIe r6.0, sec 4.2.5.1, during Link training, a PCIe component
captures the N_FTS value it receives. Per 4.2.5.6, when
transitioning the Link from L0s to L0, it must transmit N_FTS Fast
Training Sequences to enable the receiver to obtain bit and Symbol
lock.
Components may have device-specific ways to configure N_FTS values
to advertise during Link training. Define an n_fts array with an
entry for each supported data rate.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
---
dtschema/schemas/pci/pci-bus-common.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/dtschema/schemas/pci/pci-bus-common.yaml b/dtschema/schemas/pci/pci-bus-common.yaml
index a9309af..ca97a00 100644
--- a/dtschema/schemas/pci/pci-bus-common.yaml
+++ b/dtschema/schemas/pci/pci-bus-common.yaml
@@ -128,6 +128,16 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 1, 2, 4, 8, 16, 32 ]
+ n-fts:
+ description:
+ The number of Fast Training Sequences (N_FTS) required by the
+ Receiver (this component) when transitioning the Link from L0s
+ to L0; advertised during initial Link training. Each entry in
+ the array specifies a PCIe data rate
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ minItems: 1
+ maxItems: 5
+
reset-gpios:
description: GPIO controlled connection to PERST# signal
maxItems: 1
--
2.34.1
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