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Message-ID: <CAGb2v65PNymVgAW5gJzoaAN9bCvbNrUPh=MOGT71wimkGnT8Hg@mail.gmail.com>
Date: Mon, 17 Feb 2025 23:12:52 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Andre Przywara <andre.przywara@....com>
Cc: Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Jernej Skrabec <jernej.skrabec@...il.com>, Samuel Holland <samuel@...lland.org>, 
	linux-gpio@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/8] pinctrl: sunxi: move bank K register offset

On Fri, Feb 14, 2025 at 8:40 AM Andre Przywara <andre.przywara@....com> wrote:
>
> The Allwinner pincontroller register layout used to allow for at least
> 11 banks per controller, any more banks would reside at a second
> controller instance.
> When the per-bank register map size was increased with the D1, it turned
> out that the last bank (port K) of those maximum 11 banks actually would
> not fit anymore in the 512 bytes reserved for the pincontroller registers.
> On new SoCs Allwinner thus moved the last bank beyond the existing
> registers, at offset 0x500.
>
> So far SoCs never used more than 9 banks per controller, but the new
> Allwinner A523 actually uses all 11 banks. Since that SoC also uses the
> extended layout, its PortK needs to be programmed at offset 0x500.
>
> Factor out the bank offset calculation into a new function, and handle
> the case for the last bank separately. Since none of the older SoCs ever
> used PortK, we can ignore this case, and just always use offset 0x500
> for the last bank.
>
> Signed-off-by: Andre Przywara <andre.przywara@....com>

Reviewed-by: Chen-Yu Tsai <wens@...e.org>

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