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Message-ID:
 <MA0PR01MB567164E6BE03750F2200CBDBFEFB2@MA0PR01MB5671.INDPRD01.PROD.OUTLOOK.COM>
Date: Mon, 17 Feb 2025 17:26:25 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Alexander Sverdlin <alexander.sverdlin@...il.com>,
 Jingbao Qiu <qiujingbao.dlmu@...il.com>
Cc: Inochi Amaoto <inochiama@...il.com>, alexandre.belloni@...tlin.com,
 robh@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 inochiama@...look.com, paul.walmsley@...ive.com, palmer@...belt.com,
 aou@...s.berkeley.edu, dlan@...too.org, linux-kernel@...r.kernel.org,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
 linux-rtc@...r.kernel.org
Subject: Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for
 Sophgo CV1800 series SoC


On 2025/2/14 5:56, Alexander Sverdlin wrote:
> From: Jingbao Qiu <qiujingbao.dlmu@...il.com>
>
> Add RTC devicetree binding for Sophgo CV1800 SoC.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@...il.com>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@...il.com>
> ---
>   .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 53 +++++++++++++++++++
>   1 file changed, 53 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
>
> diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> new file mode 100644
> index 000000000000..b36b51a69166
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Real Time Clock of the Sophgo CV1800 SoC
> +
> +description:
> +  Real Time Clock (RTC) is an independently powered module
> +  within the chip, which includes a 32KHz oscillator and a
> +  Power On Reset/POR submodule. It can be used for time display
> +  and timed alarm generation. In addition, the hardware state
> +  machine provides triggering and timing control for chip
> +  power on, off, and reset.
> +
> +maintainers:
> +  - Jingbao Qiu <qiujingbao.dlmu@...il.com>

I guess Jingbao will not take this role. If he doesn't raise any 
objections, please just change this.

Jingbao, do you have any comment on this?

[......]



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