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Message-ID: <plurs7xfefclro5cw7c5hcd3akryzx6p75owbrkntsbwzxz26n@ac2dxrbcej6w>
Date: Fri, 21 Feb 2025 00:23:39 +0100
From: Marijn Suijten <marijn.suijten@...ainline.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Rob Clark <robdclark@...il.com>, 
	Abhinav Kumar <quic_abhinavk@...cinc.com>, Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>, 
	Simona Vetter <simona@...ll.ch>, linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org, 
	freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/7] drm/msm/dpu: pass master interface to CTL
 configuration

On 2025-02-20 12:26:20, Dmitry Baryshkov wrote:
> Active controls require setup of the master interface. Pass the selected
> interface to CTL configuration.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

Reviewed-by: Marijn Suijten <marijn.suijten@...ainline.org>

> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 ++
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 ++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index e9bbccc44dad8b391cd51daf902307105b2598fc..d1e16da00529de35cf4e205077c4264bdb70de16 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -59,6 +59,8 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg(
>  		return;
>  
>  	intf_cfg.intf = phys_enc->hw_intf->idx;
> +	if (phys_enc->split_role == ENC_ROLE_MASTER)
> +		intf_cfg.intf_master = phys_enc->hw_intf->idx;
>  	intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_CMD;
>  	intf_cfg.stream_sel = cmd_enc->stream_sel;
>  	intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index abd6600046cb3a91bf88ca240fd9b9c306b0ea2e..232055473ba55998b79dd2e8c752c129bbffbff4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -298,6 +298,8 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
>  	if (phys_enc->hw_cdm)
>  		intf_cfg.cdm = phys_enc->hw_cdm->idx;
>  	intf_cfg.intf = phys_enc->hw_intf->idx;
> +	if (phys_enc->split_role == ENC_ROLE_MASTER)
> +		intf_cfg.intf_master = phys_enc->hw_intf->idx;
>  	intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_VID;
>  	intf_cfg.stream_sel = 0; /* Don't care value for video mode */
>  	intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);
> 
> -- 
> 2.39.5
> 

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