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Message-ID: <174056556176.1596152.13438853429197428752.b4-ty@arm.com>
Date: Wed, 26 Feb 2025 10:26:09 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Mike Leach <mike.leach@...aro.org>,
	James Clark <james.clark@...aro.org>,
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Mathieu Poirier <mathieu.poirier@...aro.org>,
	Yuanfang Zhang <quic_yuanfang@...cinc.com>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
	kernel@...cinc.com,
	coresight@...ts.linaro.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] coresight-etm4x: add isb() before reading the TRCSTATR


On Thu, 16 Jan 2025 17:04:20 +0800, Yuanfang Zhang wrote:
> As recommended by section 4.3.7 ("Synchronization when using system
> instructions to progrom the trace unit") of ARM IHI 0064H.b, the
> self-hosted trace analyzer must perform a Context synchronization
> event between writing to the TRCPRGCTLR and reading the TRCSTATR.
> Additionally, add an ISB between the each read of TRCSTATR on
> coresight_timeout() when using system instructions to program the
> trace unit.
> 
> [...]

Applied, thanks!

[1/1] coresight-etm4x: add isb() before reading the TRCSTATR
      commit: 5bb4fbbcaa3a66c0fd9347a19e6dae86a48e63ab

Best regards,
-- 
Suzuki K Poulose <suzuki.poulose@....com>

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