linux-kernel - [PATCH v2 4/5] arm64: dts: ti: k3-j721s2: Add PCIe ctrl node to scm

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Message-ID: <20250402113201.151195-5-j-choudhary@ti.com>
Date: Wed, 2 Apr 2025 17:02:00 +0530
From: Jayesh Choudhary <j-choudhary@...com>
To: <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <nm@...com>, <vigneshr@...com>, <afd@...com>, <s-vadapalli@...com>,
        <linux-kernel@...r.kernel.org>
CC: <kristo@...nel.org>, <rogerq@...nel.org>, <kishon@...nel.org>,
        <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <j-choudhary@...com>
Subject: [PATCH v2 4/5] arm64: dts: ti: k3-j721s2: Add PCIe ctrl node to scm_conf region

From: Andrew Davis <afd@...com>

This region is used for controlling the function of the PCIe IP. It is
compatible with "ti,j784s4-pcie-ctrl", add this here and use it with
the PCIe node.

Signed-off-by: Andrew Davis <afd@...com>
[j-choudhary@...com: Add changes to k3-am68-sk-base-board-pcie1-ep.dtso]
Signed-off-by: Jayesh Choudhary <j-choudhary@...com>
---
 arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso | 2 +-
 arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso         | 2 +-
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi                 | 7 ++++++-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso
index 455736e378cc..ba521d661144 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso
@@ -48,6 +48,6 @@ pcie1_ep: pcie-ep@...0000 {
 		dma-coherent;
 		phys = <&serdes0_pcie_link>;
 		phy-names = "pcie-phy";
-		ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
+		ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
 	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso
index 5ff390915b75..8c2cd99cf2b4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso
@@ -38,7 +38,7 @@ pcie1_ep: pcie-ep@...0000 {
 		reg-names = "intd_cfg", "user_cfg", "reg", "mem";
 		interrupt-names = "link_state";
 		interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
-		ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
+		ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
 		max-link-speed = <3>;
 		num-lanes = <1>;
 		power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 92bf48fdbeba..c0c2b95d4652 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -57,6 +57,11 @@ phy_gmii_sel_cpsw: phy@34 {
 			#phy-cells = <1>;
 		};
 
+		pcie1_ctrl: pcie-ctrl@74 {
+			compatible = "ti,j784s4-pcie-ctrl", "syscon";
+			reg = <0x74 0x4>;
+		};
+
 		serdes_ln_ctrl: mux-controller@80 {
 			compatible = "reg-mux";
 			reg = <0x80 0x10>;
@@ -1399,7 +1404,7 @@ pcie1_rc: pcie@...0000 {
 		interrupt-names = "link_state";
 		interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
 		device_type = "pci";
-		ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
+		ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
 		max-link-speed = <3>;
 		num-lanes = <4>;
 		power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
-- 
2.34.1