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Message-ID: <c1e5b02b-f5b8-45f8-811a-ce1e05d166c9@amd.com>
Date: Thu, 3 Apr 2025 17:12:58 +0530
From: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
To: Thomas Gleixner <tglx@...utronix.de>, linux-kernel@...r.kernel.org
Cc: bp@...en8.de, mingo@...hat.com, dave.hansen@...ux.intel.com,
Thomas.Lendacky@....com, nikunj@....com, Santosh.Shukla@....com,
Vasant.Hegde@....com, Suravee.Suthikulpanit@....com, David.Kaplan@....com,
x86@...nel.org, hpa@...or.com, peterz@...radead.org, seanjc@...gle.com,
pbonzini@...hat.com, kvm@...r.kernel.org, kirill.shutemov@...ux.intel.com,
huibo.wang@....com, naveen.rao@....com, francescolavra.fl@...il.com
Subject: Re: [PATCH v3 01/17] x86/apic: Add new driver for Secure AVIC
On 4/3/2025 5:04 PM, Thomas Gleixner wrote:
> On Tue, Apr 01 2025 at 17:06, Neeraj Upadhyay wrote:
>> +static void __send_ipi_mask(const struct cpumask *mask, int vector, bool excl_self)
>> +{
>> + unsigned long query_cpu;
>> + unsigned long this_cpu;
>> + unsigned long flags;
>
> Just coalesce them into a single line: 'unsigned long a, b;'
>
Ok
>> + /* x2apic MSRs are special and need a special fence: */
>> + weak_wrmsr_fence();
>> +
>> + local_irq_save(flags);
>
> guard(irqsave)();
>
Ok
>> + this_cpu = smp_processor_id();
>> + for_each_cpu(query_cpu, mask) {
>> + if (excl_self && this_cpu == query_cpu)
>> + continue;
>> + __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
>> + vector, APIC_DEST_PHYSICAL);
>> + }
>> + local_irq_restore(flags);
>> +}
>
>> +static int x2apic_savic_probe(void)
>> +{
>> + if (!cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
>> + return 0;
>> +
>> + if (!x2apic_mode) {
>> + pr_err("Secure AVIC enabled in non x2APIC mode\n");
>> + snp_abort();
>
> Why does this return 1?
>
snp_abort() would terminate guest execution. So, code below it is not
reachable if we reach here. I will add a comment here.
- Neeraj
>> + }
>> +
>> + return 1;
>> +}
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