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Message-ID: <CAG-FcCO5ntfrdETS_WbEu9qvz82SF1rqabJKw9rTxeX=XiO-8A@mail.gmail.com>
Date: Thu, 24 Apr 2025 11:40:17 -0700
From: Ziwei Xiao <ziweixiao@...gle.com>
To: Joe Damato <jdamato@...tly.com>, Harshitha Ramamurthy <hramamurthy@...gle.com>, netdev@...r.kernel.org,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
jeroendb@...gle.com, andrew+netdev@...n.ch, willemb@...gle.com,
ziweixiao@...gle.com, pkaligineedi@...gle.com, yyd@...gle.com,
joshwash@...gle.com, shailend@...gle.com, linux@...blig.org,
thostet@...gle.com, jfraker@...gle.com, horms@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 4/6] gve: Add rx hardware timestamp expansion
On Tue, Apr 22, 2025 at 6:21 PM Joe Damato <jdamato@...tly.com> wrote:
>
> On Fri, Apr 18, 2025 at 10:12:52PM +0000, Harshitha Ramamurthy wrote:
> > From: John Fraker <jfraker@...gle.com>
> >
> > Allow the rx path to recover the high 32 bits of the full 64 bit rx
> > timestamp.
> >
> > Use the low 32 bits of the last synced nic time and the 32 bits of the
> > timestamp provided in the rx descriptor to generate a difference, which
> > is then applied to the last synced nic time to reconstruct the complete
> > 64-bit timestamp.
> >
> > This scheme remains accurate as long as no more than ~2 seconds have
> > passed between the last read of the nic clock and the timestamping
> > application of the received packet.
> >
> > Co-developed-by: Ziwei Xiao <ziweixiao@...gle.com>
> > Signed-off-by: Ziwei Xiao <ziweixiao@...gle.com>
> > Reviewed-by: Willem de Bruijn <willemb@...gle.com>
> > Signed-off-by: John Fraker <jfraker@...gle.com>
> > Signed-off-by: Harshitha Ramamurthy <hramamurthy@...gle.com>
> > ---
> > drivers/net/ethernet/google/gve/gve_rx_dqo.c | 23 ++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/google/gve/gve_rx_dqo.c b/drivers/net/ethernet/google/gve/gve_rx_dqo.c
> > index dcb0545baa50..483d188d33ab 100644
> > --- a/drivers/net/ethernet/google/gve/gve_rx_dqo.c
> > +++ b/drivers/net/ethernet/google/gve/gve_rx_dqo.c
> > @@ -437,6 +437,29 @@ static void gve_rx_skb_hash(struct sk_buff *skb,
> > skb_set_hash(skb, le32_to_cpu(compl_desc->hash), hash_type);
> > }
> >
> > +/* Expand the hardware timestamp to the full 64 bits of width, and add it to the
> > + * skb.
> > + *
> > + * This algorithm works by using the passed hardware timestamp to generate a
> > + * diff relative to the last read of the nic clock. This diff can be positive or
> > + * negative, as it is possible that we have read the clock more recently than
> > + * the hardware has received this packet. To detect this, we use the high bit of
> > + * the diff, and assume that the read is more recent if the high bit is set. In
> > + * this case we invert the process.
> > + *
> > + * Note that this means if the time delta between packet reception and the last
> > + * clock read is greater than ~2 seconds, this will provide invalid results.
> > + */
> > +static void __maybe_unused gve_rx_skb_hwtstamp(struct gve_rx_ring *rx, u32 hwts)
> > +{
> > + s64 last_read = rx->gve->last_sync_nic_counter;
>
> Does this need a READ_ONCE to match the WRITE_ONCE in the previous
> patch ?
Thanks. Will include it in the V2 patch series.
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