linux-kernel - Re: [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <fa054136-961e-4a0f-a2cb-cdd393c3b022@kernel.org>
Date: Fri, 25 Apr 2025 16:46:41 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Anand Moon <linux.amoon@...il.com>, Chanwoo Choi <cw00.choi@...sung.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
 "open list:MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BO..."
 <linux-kernel@...r.kernel.org>,
 "open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>,
 "moderated list:ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES"
 <linux-arm-kernel@...ts.infradead.org>,
 "open list:ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES"
 <linux-samsung-soc@...r.kernel.org>
Subject: Re: [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for
 MAX77686 PMIC for Exynos4412 Odroid

On 25/04/2025 15:26, Anand Moon wrote:
> The MAX77686A includes a crystal driver with an external load capacitance.
> When enabled, the crystal driver starts in low power mode. The
> LowJitterMode bit controls the crystal driver, allowing it to switch
> between low power mode and low jitter mode (high power mode).
> Setting the LowJitterMode bit to 1 activates low jitter mode on
> three channels simultaneously. These three 32khz buffer outputs
> (32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.
> 
> The 32khz_ap output is typically routed to the AP Processor, while the
> 32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
> or peripheral chipsets.
> 
> Signed-off-by: Anand Moon <linux.amoon@...il.com>
> ---
>  arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> index 93ddbd4b0a18..03943c666d11 100644
> --- a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> @@ -289,6 +289,13 @@ max77686: pmic@9 {
>  		reg = <0x09>;
>  		#clock-cells = <1>;
>  
> +		max77686_osc: clocks {
> +			compatible = "max77686-rtc";

I don't believe this works.

Best regards,
Krzysztof