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Message-ID: <72078B8D-F03E-4783-8AC2-A36464A4B6A1@zytor.com>
Date: Tue, 29 Apr 2025 14:23:55 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>,
        Andrew Cooper <andrew.cooper3@...rix.com>
CC: Ingo Molnar <mingo@...nel.org>, Arnd Bergmann <arnd@...db.de>,
        Arnd Bergmann <arnd@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
        Juergen Gross <jgross@...e.com>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Alexander Usyskin <alexander.usyskin@...el.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Mateusz Jończyk <mat.jonczyk@...pl>,
        Mike Rapoport <rppt@...nel.org>, Ard Biesheuvel <ardb@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>, linux-kernel@...r.kernel.org,
        xen-devel@...ts.xenproject.org
Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case handling to C

On April 29, 2025 1:12:48 PM PDT, Linus Torvalds <torvalds@...ux-foundation.org> wrote:
>On Tue, 29 Apr 2025 at 12:13, Andrew Cooper <andrew.cooper3@...rix.com> wrote:
>>
>> That would improve code generation for 32bit, but generally regress 64bit.
>>
>> Preloading the destination register with -1 is better than the CMOV form
>> emitted by the builtin; BSF's habit of conditionally not writing the
>> destination register *is* a CMOV of sorts.
>
>Right you are. So we'd need to do this just for the x86-32 case. Oh
>well. Ugly, but still prettier than what we have now, I guess.
>
>         Linus

Could you file a gcc bug? Gcc shouldn't generate worse code than inline asm ...

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