linux-kernel - Re: [PATCH 3/3] arm64: dts: renesas: Add pinctrl for renesas RZ/T2H SoC

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Message-ID: <CAMuHMdVLktxp5EC1P56Y0SYcMOHsnpMeW+joYTEj4_amoQoHHA@mail.gmail.com>
Date: Wed, 28 May 2025 13:50:39 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Cc: thierry.bultel@...atsea.fr, linux-renesas-soc@...r.kernel.org, 
	paul.barker.ct@...renesas.com, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: renesas: Add pinctrl for renesas RZ/T2H SoC

Hi Thierry,

On Mon, 19 May 2025 at 23:57, Thierry Bultel
<thierry.bultel.yh@...renesas.com> wrote:
> Add pinctrl node for r9a09g077
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> @@ -101,6 +101,15 @@ cpg: clock-controller@...80000 {
>                         #power-domain-cells = <0>;
>                 };
>
> +               pinctrl: pinctrl@...c0000 {

The unit address does not match the first reg property.

> +                       compatible = "renesas,pfc-r9a09g077";
> +                       reg = <0 0x802c0000 0 0x2000>,
> +                             <0 0x812c0000 0 0x2000>;
> +                       gpio-controller;
> +                       #gpio-cells = <2>;
> +                       gpio-ranges = <&pinctrl 0 0 287>;

No (optional?) clock, no interrupts...

> +               };
> +
>                 gic: interrupt-controller@...00000 {
>                         compatible = "arm,gic-v3";
>                         reg = <0x0 0x83000000 0 0x40000>,

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds