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Message-ID: <0379000a-7ca6-4619-ad71-0ea9f71ffb8f@kernel.org>
Date: Tue, 17 Jun 2025 08:27:00 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: adrianhoyin.ng@...era.com, dinguyen@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Cc: Matthew Gerlach <matthew.gerlach@...rera.com>
Subject: Re: [RESEND PATCH 1/2] arm64: dts: socfpga: agilex5: Add SMMU-V3-PMCG
 nodes

On 16/06/2025 16:50, adrianhoyin.ng@...era.com wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
> 
> Add SMMU-V3 PMCG nodes for Agilex5.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
> Reviewed-by: Matthew Gerlach <matthew.gerlach@...rera.com>
> ---
>  .../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 62 +++++++++++++++++++
>  1 file changed, 62 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 7d9394a04302..06920de87a41 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -133,6 +133,68 @@ usbphy0: usbphy {
>  		compatible = "usb-nop-xceiv";
>  	};
>  
> +	pmu0: pmu {
> +		compatible = "arm,armv8-pmuv3";
> +		interrupt-parent = <&intc>;
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> +	};
> +
> +	pmu0_tcu: pmu@...02000 {


It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Maybe you need to update your dtschema and yamllint. Don't rely on
distro packages for dtschema and be sure you are using the latest
released dtschema.

Or... if it passes still obviously mixes MMIO and non-MMIO nodes. MMIO
nodes go into soc@0.

Best regards,
Krzysztof

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