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Message-ID:
<SN6PR02MB415700541E44263490781D86D422A@SN6PR02MB4157.namprd02.prod.outlook.com>
Date: Tue, 5 Aug 2025 18:09:32 +0000
From: Michael Kelley <mhklinux@...look.com>
To: Tianyu Lan <ltykernel@...il.com>, "kys@...rosoft.com" <kys@...rosoft.com>,
"haiyangz@...rosoft.com" <haiyangz@...rosoft.com>, "wei.liu@...nel.org"
<wei.liu@...nel.org>, "decui@...rosoft.com" <decui@...rosoft.com>,
"tglx@...utronix.de" <tglx@...utronix.de>, "mingo@...hat.com"
<mingo@...hat.com>, "bp@...en8.de" <bp@...en8.de>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>, "x86@...nel.org"
<x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>, "arnd@...db.de"
<arnd@...db.de>, "Neeraj.Upadhyay@....com" <Neeraj.Upadhyay@....com>,
"kvijayab@....com" <kvijayab@....com>
CC: Tianyu Lan <tiala@...rosoft.com>, "linux-arch@...r.kernel.org"
<linux-arch@...r.kernel.org>, "linux-hyperv@...r.kernel.org"
<linux-hyperv@...r.kernel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: RE: [RFC PATCH V5 2/4] Drivers: hv: Allow vmbus message synic
interrupt injected from Hyper-V
From: Tianyu Lan <ltykernel@...il.com> Sent: Monday, August 4, 2025 11:05 AM
>
> When Secure AVIC is enabled, VMBus driver should
> call x2apic Secure AVIC interface to allow Hyper-V
> to inject VMBus message interrupt.
>
> Reviewed-by: Michael Kelley <mhklinux@...look.com>
> Signed-off-by: Tianyu Lan <tiala@...rosoft.com>
> ---
> Change since RFC V4:
> - Change the order to call hv_enable_coco_interrupt()
> in the hv_synic_enable/disable_regs().
> - Update commit title "Drivers/hv:" to "Drivers: hv:"
>
> Change since RFC V3:
> - Disable VMBus Message interrupt via hv_enable_
> coco_interrupt() in the hv_synic_disable_regs().
> ---
> arch/x86/hyperv/hv_apic.c | 5 +++++
> drivers/hv/hv.c | 7 ++++++-
> drivers/hv/hv_common.c | 5 +++++
> include/asm-generic/mshyperv.h | 1 +
> 4 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> index e669053b637d..a8de503def37 100644
> --- a/arch/x86/hyperv/hv_apic.c
> +++ b/arch/x86/hyperv/hv_apic.c
> @@ -53,6 +53,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
> wrmsrq(HV_X64_MSR_ICR, reg_val);
> }
>
> +void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
> +{
> + apic_update_vector(cpu, vector, set);
> +}
> +
> static u32 hv_apic_read(u32 reg)
> {
> u32 reg_val, hi;
> diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
> index 308c8f279df8..2ff433cb5cc2 100644
> --- a/drivers/hv/hv.c
> +++ b/drivers/hv/hv.c
> @@ -314,8 +314,11 @@ void hv_synic_enable_regs(unsigned int cpu)
> shared_sint.vector = vmbus_interrupt;
> shared_sint.masked = false;
> shared_sint.auto_eoi = hv_recommend_using_aeoi();
> +
> hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
>
> + hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
> +
> /* Enable the global synic bit */
> sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
> sctrl.enable = 1;
> @@ -342,7 +345,6 @@ void hv_synic_disable_regs(unsigned int cpu)
> union hv_synic_scontrol sctrl;
>
> shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
> -
> shared_sint.masked = 1;
>
> /* Need to correctly cleanup in the case of SMP!!! */
> @@ -350,6 +352,9 @@ void hv_synic_disable_regs(unsigned int cpu)
> hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
>
> simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
> +
> + hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
> +
I agree with Neeraj's comment on the placement of this line of code.
As I commented on v4 of the series, the hv_synic_enable/disable_regs()
functions have units of code that do read, modify, then write of a
synthetic MSR, such as the SIMP, SIEFP, and SINT. It's weird to have
hv_enable_coco_interrupt() in the middle of such a unit. In this v5,
you fixed the issue for hv_synic_enable_regs(), but not here for
hv_synic_disable_regs(). The call to hv_enable_coco_interrupt()
should go after call to hv_set_msr(HV_MSR_SINT0 ....), but before
the call to hv_get_msr(HV_MSR_SIMP) so that the read/modify/write
units aren't mixed with other things.
Michael
> /*
> * In Isolation VM, sim and sief pages are allocated by
> * paravisor. These pages also will be used by kdump
> diff --git a/drivers/hv/hv_common.c b/drivers/hv/hv_common.c
> index 49898d10faff..0f024ab3d360 100644
> --- a/drivers/hv/hv_common.c
> +++ b/drivers/hv/hv_common.c
> @@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
> }
> EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
>
> +void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
> +{
> +}
> +EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
> +
> void hv_identify_partition_type(void)
> {
> /* Assume guest role */
> diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyperv.h
> index a729b77983fa..7907c9878369 100644
> --- a/include/asm-generic/mshyperv.h
> +++ b/include/asm-generic/mshyperv.h
> @@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
> bool hv_isolation_type_snp(void);
> u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
> u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
> +void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
> void hyperv_cleanup(void);
> bool hv_query_ext_cap(u64 cap_query);
> void hv_setup_dma_ops(struct device *dev, bool coherent);
> --
> 2.25.1
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