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Message-Id: <175490837428.9171.16946610135898864162.b4-ty@kernel.org>
Date: Mon, 11 Aug 2025 16:02:54 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
To: lpieralisi@...nel.org, kwilczynski@...nel.org, robh@...nel.org,
bhelgaas@...gle.com, sfr@...b.auug.org.au, qiang.yu@....qualcomm.com,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
andersson@...nel.org, konradybcio@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, Wenbin Yao <quic_wenbyao@...cinc.com>
Cc: krishna.chundru@....qualcomm.com, quic_vbadigan@...cinc.com,
quic_mrana@...cinc.com, quic_cang@...cinc.com
Subject: Re: (subset) [PATCH v5 0/3] arm64: qcom: x1e80100-qcp: Add power
supply and sideband signals for PCIe RC
On Tue, 22 Jul 2025 17:11:48 +0800, Wenbin Yao wrote:
> The first patch enables the PCI Power Control driver to control the power
> state of PCI slots. The second patch adds the bus topology of PCIe domain 3
> on x1e80100 platform. The third patch adds perst, wake and clkreq sideband
> signals, and describe the regulators powering the rails of the PCI slots in
> the devicetree for PCIe3 controller and PHY device.
>
> The patchset has been modified based on comments and suggestions.
>
> [...]
Applied, thanks!
[1/3] PCI: dwc: enable PCI Power Control Slot driver for QCOM
commit: add7b05aeeb417c86239e6731a168e6c46b83279
Best regards,
--
Manivannan Sadhasivam <mani@...nel.org>
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