linux-kernel - Re: [PATCH RFC v2 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <2vtxgzwsr6sztu35zeebuho3ie4bbifb75v5usxfzcys2ufx4f@fnig7kqij3us>
Date: Wed, 13 Aug 2025 21:41:02 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Vikash Garodia <quic_vgarodia@...cinc.com>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC v2 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5

On Tue, Aug 12, 2025 at 09:01:36PM +0530, Vikash Garodia wrote:
> 
> On 8/12/2025 8:09 PM, Dmitry Baryshkov wrote:
> > On Tue, Aug 12, 2025 at 04:21:12PM +0200, Konrad Dybcio wrote:
> >> On 8/6/25 2:38 PM, Krzysztof Kozlowski wrote:
> >>> Add Iris video codec to SM8750 SoC, which comes with significantly
> >>> different powering up sequence than previous SM8650, thus different
> >>> clocks and resets.  For consistency keep existing clock and clock-names
> >>> naming, so the list shares common part.
> >>>
> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> >>>
> >>> ---
> >>
> >> [...]
> >>
> >>> +			iris_opp_table: opp-table {
> >>> +				compatible = "operating-points-v2";
> >>> +
> >>> +				opp-240000000 {
> >>> +					opp-hz = /bits/ 64 <240000000>;
> >>> +					required-opps = <&rpmhpd_opp_low_svs_d1>,
> >>> +							<&rpmhpd_opp_low_svs_d1>;
> >>> +				};
> >>> +
> >>> +				opp-338000000 {
> >>> +					opp-hz = /bits/ 64 <338000000>;
> >>> +					required-opps = <&rpmhpd_opp_low_svs>,
> >>> +							<&rpmhpd_opp_low_svs>;
> >>> +				};
> >>> +
> >>> +				opp-420000000 {
> >>> +					opp-hz = /bits/ 64 <420000000>;
> >>> +					required-opps = <&rpmhpd_opp_svs>,
> >>> +							<&rpmhpd_opp_svs>;
> >>> +				};
> >>> +
> >>> +				opp-444000000 {
> >>> +					opp-hz = /bits/ 64 <444000000>;
> >>> +					required-opps = <&rpmhpd_opp_svs_l1>,
> >>> +							<&rpmhpd_opp_svs_l1>;
> >>> +				};
> >>> +
> >>> +				opp-533333334 {
> >>> +					opp-hz = /bits/ 64 <533333334>;
> >>> +					required-opps = <&rpmhpd_opp_nom>,
> >>> +							<&rpmhpd_opp_nom>;
> >>> +				};
> >>
> >> There's an additional OPP: 570 MHz @ NOM_L1
> >>
> >> +Dmitry, Vikash, please make sure you're OK with the iommu entries
> > 
> > We still don't have a way to describe it other way at this point.
> 
> I could validate the extended "iommu-map-masks" proposal. Given that we have a

Was it posted? If not, let's get it ASAP.

> new binding for SM8750 [1] , does it make sense to add iommus min/max as [1,5] ?

Why [1, 5]? It should be [1, 2] or just [1, 1] + your proposal.

> such that later if new property is introduced "iommu-map-mask", it does not
> break ABI.
> 
> iommus = <&apps_smmu 0x1940 0>;
> iommu-map-masks = <0 &apps_smmu 0x1947 1 0>;
> 
> [1] https://lore.kernel.org/all/20250804-sm8750-iris-v2-1-6d78407f8078@linaro.org/
> 
> Regards,
> Vikash
> > 
> >>
> >> the other properties look OK
> >>
> >> Konrad
> > 

-- 
With best wishes
Dmitry