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Message-ID: <87cy8l500x.ffs@tglx>
Date: Sat, 23 Aug 2025 21:08:14 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Bjorn Helgaas <helgaas@...nel.org>, Inochi Amaoto <inochiama@...il.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, Marc Zyngier <maz@...nel.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, Shradha Gupta
<shradhagupta@...ux.microsoft.com>, Haiyang Zhang
<haiyangz@...rosoft.com>, Jonathan Cameron <Jonathan.Cameron@...ei.com>,
Juergen Gross <jgross@...e.com>, Nicolin Chen <nicolinc@...dia.com>, Jason
Gunthorpe <jgg@...pe.ca>, Chen Wang <unicorn_wang@...look.com>,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, Yixun Lan
<dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v2 2/4] PCI/MSI: Add startup/shutdown for per device
domains
On Wed, Aug 20 2025 at 15:54, Bjorn Helgaas wrote:
> On Thu, Aug 14, 2025 at 07:28:32AM +0800, Inochi Amaoto wrote:
>> As the RISC-V PLIC can not apply affinity setting without calling
>> irq_enable(), it will make the interrupt unavailble when using as
>> an underlying IRQ chip for MSI controller.
>
> s/unavailble/unavailable/ (mentioned previously)
>
>> Implement .irq_startup() and .irq_shutdown() for the PCI MSI and
>> MSI-X templates. For chips that specify MSI_FLAG_PCI_MSI_STARTUP_PARENT,
>> these startup and shutdown the parent as well, which allows the
>> irq on the parent chip to be enabled if the irq is not enabled
>> when allocating. This is necessary for the MSI controllers which
>> use PLIC as underlying IRQ chip.
>
> s/irq/IRQ/ a couple times above
>
>> Suggested-by: Thomas Gleixner <tglx@...utronix.de>
>> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
>
> Acked-by: Bjorn Helgaas <bhelgaas@...gle.com>
>
> Thomas, I assume you'll merge this series; let me know if not.
I'll pick it up and fixup the wording as I go.
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