[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID:
<MAUPR01MB11072A23DEEA6F37D43DF0AFDFE3AA@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM>
Date: Fri, 29 Aug 2025 11:11:33 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Brian Masney <bmasney@...hat.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Vladimir Zapolskiy <vz@...ia.com>,
Piotr Wojtaszczyk <piotr.wojtaszczyk@...esys.com>,
Inochi Amaoto <inochiama@...il.com>, Michal Simek <michal.simek@....com>,
Bjorn Andersson <andersson@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
Andrea della Porta <andrea.porta@...e.com>,
Maxime Ripard <mripard@...nel.org>
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, sophgo@...ts.linux.dev,
linux-arm-msm@...r.kernel.org, linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH 6/8] clk: sophgo: sg2042-pll: remove round_rate() in favor
of determine_rate()
On 8/29/2025 8:38 AM, Brian Masney wrote:
> This driver implements both the determine_rate() and round_rate() clk
> ops, and the round_rate() clk ops is deprecated. When both are defined,
> clk_core_determine_round_nolock() from the clk core will only use the
> determine_rate() clk ops, so let's remove the round_rate() clk ops since
> it's unused.
>
> The implementation of sg2042_clk_pll_determine_rate() calls
> sg2042_clk_pll_round_rate(), so this folds the two into a single
> function.
>
> Reviewed-by: Chen Wang <unicorn_wang@...look.com>
> Signed-off-by: Brian Masney <bmasney@...hat.com>
Tested-by: Chen Wang <unicorn_wang@...look.com> # Pioneerbox
Thanks,
Chen
> ---
> drivers/clk/sophgo/clk-sg2042-pll.c | 26 +++++++++-----------------
> 1 file changed, 9 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c
> index e5fb0bb7ac4f97616f3b472fcab45e5729eb653e..110b6ee06fe4b61e89f3cbf2ce00eb03c078afb6 100644
> --- a/drivers/clk/sophgo/clk-sg2042-pll.c
> +++ b/drivers/clk/sophgo/clk-sg2042-pll.c
> @@ -346,37 +346,30 @@ static unsigned long sg2042_clk_pll_recalc_rate(struct clk_hw *hw,
> return rate;
> }
>
> -static long sg2042_clk_pll_round_rate(struct clk_hw *hw,
> - unsigned long req_rate,
> - unsigned long *prate)
> +static int sg2042_clk_pll_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> {
> struct sg2042_pll_ctrl pctrl_table;
> unsigned int value;
> long proper_rate;
> int ret;
>
> - ret = sg2042_get_pll_ctl_setting(&pctrl_table, req_rate, *prate);
> + ret = sg2042_get_pll_ctl_setting(&pctrl_table,
> + min(req->rate, req->max_rate),
> + req->best_parent_rate);
> if (ret) {
> proper_rate = 0;
> goto out;
> }
>
> value = sg2042_pll_ctrl_encode(&pctrl_table);
> - proper_rate = (long)sg2042_pll_recalc_rate(value, *prate);
> + proper_rate = (long)sg2042_pll_recalc_rate(value, req->best_parent_rate);
>
> out:
> - pr_debug("--> %s: pll_round_rate: val = %ld\n",
> + pr_debug("--> %s: pll_determine_rate: val = %ld\n",
> clk_hw_get_name(hw), proper_rate);
> - return proper_rate;
> -}
> + req->rate = proper_rate;
>
> -static int sg2042_clk_pll_determine_rate(struct clk_hw *hw,
> - struct clk_rate_request *req)
> -{
> - req->rate = sg2042_clk_pll_round_rate(hw, min(req->rate, req->max_rate),
> - &req->best_parent_rate);
> - pr_debug("--> %s: pll_determine_rate: val = %ld\n",
> - clk_hw_get_name(hw), req->rate);
> return 0;
> }
>
> @@ -417,14 +410,13 @@ static int sg2042_clk_pll_set_rate(struct clk_hw *hw,
>
> static const struct clk_ops sg2042_clk_pll_ops = {
> .recalc_rate = sg2042_clk_pll_recalc_rate,
> - .round_rate = sg2042_clk_pll_round_rate,
> .determine_rate = sg2042_clk_pll_determine_rate,
> .set_rate = sg2042_clk_pll_set_rate,
> };
>
> static const struct clk_ops sg2042_clk_pll_ro_ops = {
> .recalc_rate = sg2042_clk_pll_recalc_rate,
> - .round_rate = sg2042_clk_pll_round_rate,
> + .determine_rate = sg2042_clk_pll_determine_rate,
> };
>
> /*
>
Powered by blists - more mailing lists