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Message-Id: <175699250964.3374853.16885676491827667777.b4-ty@linaro.org>
Date: Thu, 04 Sep 2025 15:28:29 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Anand Moon <linux.amoon@...il.com>
Subject: Re: [PATCH v2 00/11] Add cache information to Amlogic SoC
Hi,
On Mon, 25 Aug 2025 12:21:40 +0530, Anand Moon wrote:
> Most publicly available Amlogic datasheets mention that the CPU employs
> a architecture, quad-core ARM Cortex-A53 and ARM Cortex A55 and
> Cortex-A73 and Cortex-A53 cluster, sharing a unified L2 cache to enhance
> overall system performance.
>
> However, these documents typically omit details regarding the sizes of the
> L1 data cache, L1 instruction cache, and L2 cache.
>
> [...]
Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.18/arm64-dt)
[01/11] arm64: dts: amlogic: Add cache information to the Amlogic GXBB and GXL SoC
https://git.kernel.org/amlogic/c/d7fc05da8ba28d22fb9bd79d9308f928fcb81c19
[02/11] arm64: dts: amlogic: Add cache information to the Amlogic SM1 SoC
https://git.kernel.org/amlogic/c/fd7b48b1f91e1830e22e73744e7525af24d8ae25
[03/11] arm64: dts: amlogic: Add cache information to the Amlogic G12A SoCS
https://git.kernel.org/amlogic/c/a4428e52babdb682f47f99b0b816e227e51a3835
[04/11] arm64: dts: amlogic: Add cache information to the Amlogic AXG SoCS
https://git.kernel.org/amlogic/c/3b6ad2a433672f4ed9e1c90e4ae6b94683d1f1a2
[05/11] arm64: dts: amlogic: Add cache information to the Amlogic GXM SoCS
https://git.kernel.org/amlogic/c/fe2c12bc0a8f9e5db87bfbf231658eadef4cdd47
[06/11] arm64: dts: amlogic: Add cache information to the Amlogic A1 SoC
https://git.kernel.org/amlogic/c/2d97773212f8516b2fe3177077b1ecf7b67a4e09
[07/11] arm64: dts: amlogic: Add cache information to the Amlogic A4 SoC
https://git.kernel.org/amlogic/c/57273dc063d5a80e8cebc20878369099992be01a
[08/11] arm64: dts: amlogic: Add cache information to the Amlogic C3 SoC
https://git.kernel.org/amlogic/c/6d4ab38a0a21c82076105e4cc37087ef92253c7b
[09/11] arm64: dts: amlogic: Add cache information to the Amlogic S7 SoC
https://git.kernel.org/amlogic/c/494c362fa1633bba127045ace8f0eea0b277af28
[10/11] arm64: dts: amlogic: Add cache information to the Amlogic S922X SoC
https://git.kernel.org/amlogic/c/e7f85e6c155aed3e10e698dd05bd04b2d52edb59
[11/11] arm64: dts: amlogic: Add cache information to the Amlogic T7 SoC
https://git.kernel.org/amlogic/c/e97fdb9b8a0f8bd349de48815694f8a7200e3d62
These changes has been applied on the intermediate git tree [1].
The v6.18/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.
In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].
The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.
If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
--
Neil
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