linux-kernel - Re: [PATCH v2 02/11] arm64: dts: amlogic: Add cache information to the Amlogic SM1 SoC

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Message-ID: <e31d35c8-b2b2-4301-a13c-e18ad83a21d6@kernel.org>
Date: Thu, 4 Sep 2025 15:37:47 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Anand Moon <linux.amoon@...il.com>,
 Neil Armstrong <neil.armstrong@...aro.org>,
 Kevin Hilman <khilman@...libre.com>, Jerome Brunet <jbrunet@...libre.com>,
 Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 "moderated list:ARM/Amlogic Meson SoC support"
 <linux-arm-kernel@...ts.infradead.org>,
 "open list:ARM/Amlogic Meson SoC support"
 <linux-amlogic@...ts.infradead.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 02/11] arm64: dts: amlogic: Add cache information to
 the Amlogic SM1 SoC

On 25/08/2025 08:51, Anand Moon wrote:
> As per S905X3 datasheet add missing cache information to the Amlogic
> SM1 SoC. ARM Cortex-A55 CPU uses unified L3 cache instead of L2 cache.
> 
> - Each Cortex-A55 core has 32KB of L1 instruction cache available and
> 	32KB of L1 data cache available.
> - Along with 256KB Unified L2 cache.
> 
> Cache memory significantly reduces the time it takes for the CPU
> to access data and instructions, leading to faster program execution
> and overall system responsiveness.


This statement is obvious and completely redundant. Drop it from all of
the commits.

Best regards,
Krzysztof