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Message-ID: <746e10a5-02fe-4f0d-ab86-d674a8fedab0@kernel.org>
Date: Sun, 14 Sep 2025 14:05:49 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: "irving.ch.lin" <irving-ch.lin@...iatek.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Richard Cochran <richardcochran@...il.com>
Cc: Qiqi Wang <qiqi.wang@...iatek.com>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
linux-pm@...r.kernel.org, netdev@...r.kernel.org,
Project_Global_Chrome_Upstream_Group@...iatek.com, sirius.wang@...iatek.com,
vince-wl.liu@...iatek.com, jh.hsu@...iatek.com
Subject: Re: [PATCH v2 2/4] dt-bindings: power: mediatek: Add MT8189 power
domain definitions
On 12/09/2025 14:04, irving.ch.lin wrote:
> From: Irving-ch Lin <irving-ch.lin@...iatek.com>
>
> Add device tree bindings for the power domains of MediaTek MT8189 SoC.
> These definitions will be used to describe the power domain topology in
> device tree sources.
>
> Signed-off-by: Irving-ch Lin <irving-ch.lin@...iatek.com>
> ---
> .../mediatek,mt8189-power-controller.yaml | 88 +++++++++++++++++++
> .../dt-bindings/power/mediatek,mt8189-power.h | 38 ++++++++
> 2 files changed, 126 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml
> create mode 100644 include/dt-bindings/power/mediatek,mt8189-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml
> new file mode 100644
> index 000000000000..71156f7edafe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/mediatek,mt8189-power-controller.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/mediatek,mt8189-power-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Power Domains Controller for MT8189
> +
> +maintainers:
> + - Qiqi Wang <qiqi.wang@...iatek.com>
> +
> +description: |
> + MediaTek processors include support for multiple power domains which can be
> + powered up/down by software based on different application scenes to save power.
> +
> + IP cores belonging to a power domain should contain a 'power-domains'
> + property that is a phandle for SCPSYS node representing the domain.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8189-scpsys
> +
> + reg:
> + maxItems: 1
> +
> + '#power-domain-cells':
> + const: 1
> +
> + clocks:
> + description: |
> + A number of phandles to clocks that need to be enabled during domain
> + power-up sequencing.
Nothing improved, there is no such code in the bindings.
> +
> + clock-names:
> + description: |
> + List of names of clocks, in order to match the power-up sequencing
> + for each power domain we need to group the clocks by name. BASIC
Nothing improved here either.
> + clocks need to be enabled before enabling the corresponding power
> + domain, and should not have a '-' in their name (i.e mm, mfg, venc).
> + SUSBYS clocks need to be enabled before releasing the bus protection,
> + and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
> +
> + In order to follow properly the power-up sequencing, the clocks must
> + be specified by order, adding first the BASIC clocks followed by the
> + SUSBSYS clocks.
> +
> +patternProperties:
> + "^mfg[01]-supply$":
> + description: |
> + Regulator supply for mfg domain. With this attribute, scpsys can manage
> + mfg regulator in mtcmos control flow, to achieve low power scenario.
> +
> +required:
> + - compatible
> + - reg
> + - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mediatek,mt8189-clk.h>
> + #include <dt-bindings/power/mediatek,mt8189-power.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + scpsys: power-controller@...01000 {
> + compatible = "mediatek,mt8189-scpsys";
> + reg = <0 0x1c001000 0 0x1000>;
> + #power-domain-cells = <1>;
> + clocks = /* MFG */
> + <&topckgen_clk CLK_TOP_MFG_REF_SEL>,
> + <&apmixedsys_clk CLK_APMIXED_MFGPLL>;
> + clock-names = "mfg", "mfg_top";
> + mfg0-supply = <&mt6359_vproc1_buck_reg>;
> + mfg1-supply = <&mt6359_vsram_proc1_ldo_reg>;
> + };
> +
> + /* Example of module to register power domain */
What do the guidelines speak about this? Don't do this, don't add the
consumers. Drop.
The binding did not improve, so I am not doing full review. Please go
through writing bindings or tutorials/presentations explaining this, so
we won't need to repeat same comments.
Best regards,
Krzysztof
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