| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <6e052f056904651aae3cdb2ea50ca54c252cb4a2.camel@linux.intel.com>
Date: Tue, 16 Sep 2025 16:31:00 -0700
From: srinivas pandruvada <srinivas.pandruvada@...ux.intel.com>
To: Xinpeng Sun <xinpeng.sun@...el.com>, jikos@...nel.org, bentiss@...nel.org
Cc: linux-input@...r.kernel.org, linux-kernel@...r.kernel.org,
even.xu@...el.com, Rui Zhang <rui1.zhang@...el.com>
Subject: Re: [PATCH v3] hid: intel-thc-hid: intel-quicki2c: support ACPI
config for advanced features
On Tue, 2025-09-16 at 10:57 +0800, Xinpeng Sun wrote:
> There is a new BIOS enhancement that adds the capability to configure
> the
> following two features of I2C subsystem introduced in commit 1ed0b48
> ("Intel-thc: Introduce max input size control") and commit 3f2a921
> ("Intel-thc: Introduce interrupt delay control"):
> - Max input size control
> - Interrupt delay control
>
> As BIOS is used for the configuration of these two features, change
> driver
> data usage to indicate hardware capability, and add corresponding
> ACPI
> configuration support in QuickI2C driver.
>
> Signed-off-by: Xinpeng Sun <xinpeng.sun@...el.com>
> Tested-by: Rui Zhang <rui1.zhang@...el.com>
> ---
You need change log as this v3..
Thanks,
Srinivas
> .../intel-quicki2c/pci-quicki2c.c | 39 +++++++++++++++--
> --
> .../intel-quicki2c/quicki2c-dev.h | 24 +++++++++++-
> 2 files changed, 53 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c
> b/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c
> index 854926b3cfd4..3ce5a692b92b 100644
> --- a/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c
> +++ b/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c
> @@ -23,6 +23,7 @@
>
> static struct quicki2c_ddata ptl_ddata = {
> .max_detect_size = MAX_RX_DETECT_SIZE_PTL,
> + .max_interrupt_delay = MAX_RX_INTERRUPT_DELAY,
> };
>
> /* THC QuickI2C ACPI method to get device properties */
> @@ -200,6 +201,21 @@ static int quicki2c_get_acpi_resources(struct
> quicki2c_device *qcdev)
> return -EOPNOTSUPP;
> }
>
> + if (qcdev->ddata) {
> + qcdev->i2c_max_frame_size_enable = i2c_config.FSEN;
> + qcdev->i2c_int_delay_enable = i2c_config.INDE;
> +
> + if (i2c_config.FSVL <= qcdev->ddata-
> >max_detect_size)
> + qcdev->i2c_max_frame_size = i2c_config.FSVL;
> + else
> + qcdev->i2c_max_frame_size = qcdev->ddata-
> >max_detect_size;
> +
> + if (i2c_config.INDV <= qcdev->ddata-
> >max_interrupt_delay)
> + qcdev->i2c_int_delay = i2c_config.INDV;
> + else
> + qcdev->i2c_int_delay = qcdev->ddata-
> >max_interrupt_delay;
> + }
> +
> return 0;
> }
>
> @@ -441,17 +457,24 @@ static void quicki2c_dma_adv_enable(struct
> quicki2c_device *qcdev)
> * max input length <= THC detect capability, enable the
> feature with device
> * max input length.
> */
> - if (qcdev->ddata->max_detect_size >=
> - le16_to_cpu(qcdev->dev_desc.max_input_len)) {
> - thc_i2c_set_rx_max_size(qcdev->thc_hw,
> - le16_to_cpu(qcdev-
> >dev_desc.max_input_len));
> + if (qcdev->i2c_max_frame_size_enable) {
> + if (qcdev->i2c_max_frame_size >=
> + le16_to_cpu(qcdev->dev_desc.max_input_len)) {
> + thc_i2c_set_rx_max_size(qcdev->thc_hw,
> + le16_to_cpu(qcdev-
> >dev_desc.max_input_len));
> + } else {
> + dev_warn(qcdev->dev,
> + "Max frame size is smaller than hid
> max input length!");
> + thc_i2c_set_rx_max_size(qcdev->thc_hw,
> + le16_to_cpu(qcdev-
> >i2c_max_frame_size));
> + }
> thc_i2c_rx_max_size_enable(qcdev->thc_hw, true);
> }
>
> /* If platform supports interrupt delay feature, enable it
> with given delay */
> - if (qcdev->ddata->interrupt_delay) {
> + if (qcdev->i2c_int_delay_enable) {
> thc_i2c_set_rx_int_delay(qcdev->thc_hw,
> - qcdev->ddata-
> >interrupt_delay);
> + qcdev->i2c_int_delay * 10);
> thc_i2c_rx_int_delay_enable(qcdev->thc_hw, true);
> }
> }
> @@ -464,10 +487,10 @@ static void quicki2c_dma_adv_enable(struct
> quicki2c_device *qcdev)
> */
> static void quicki2c_dma_adv_disable(struct quicki2c_device *qcdev)
> {
> - if (qcdev->ddata->max_detect_size)
> + if (qcdev->i2c_max_frame_size_enable)
> thc_i2c_rx_max_size_enable(qcdev->thc_hw, false);
>
> - if (qcdev->ddata->interrupt_delay)
> + if (qcdev->i2c_int_delay_enable)
> thc_i2c_rx_int_delay_enable(qcdev->thc_hw, false);
> }
>
> diff --git a/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
> b/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
> index d412eafcf9ea..0d423d5dd7a7 100644
> --- a/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
> +++ b/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
> @@ -38,6 +38,8 @@
>
> /* PTL Max packet size detection capability is 255 Bytes */
> #define MAX_RX_DETECT_SIZE_PTL 255
> +/* Max interrupt delay capability is 2.56ms */
> +#define MAX_RX_INTERRUPT_DELAY 256
>
> /* Default interrupt delay is 1ms, suitable for most devices */
> #define DEFAULT_INTERRUPT_DELAY_US (1 * USEC_PER_MSEC)
> @@ -101,6 +103,10 @@ struct quicki2c_subip_acpi_parameter {
> * @HMTD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line
> Transmit HOLD Period
> * @HMRD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line
> Receive HOLD Period
> * @HMSL: Maximum length (in ic_clk_cycles) of suppressed spikes in
> High Speed Mode
> + * @FSEN: Maximum Frame Size Feature Enable Control
> + * @FSVL: Maximum Frame Size Value (unit in Bytes)
> + * @INDE: Interrupt Delay Feature Enable Control
> + * @INDV: Interrupt Delay Value (unit in 10 us)
> *
> * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ISUB method,
> used for
> * I2C timing configure.
> @@ -127,17 +133,22 @@ struct quicki2c_subip_acpi_config {
> u64 HMTD;
> u64 HMRD;
> u64 HMSL;
> +
> + u64 FSEN;
> + u64 FSVL;
> + u64 INDE;
> + u64 INDV;
> u8 reserved;
> };
>
> /**
> * struct quicki2c_ddata - Driver specific data for quicki2c device
> * @max_detect_size: Identify max packet size detect for rx
> - * @interrupt_delay: Identify interrupt detect delay for rx
> + * @interrupt_delay: Identify max interrupt detect delay for rx
> */
> struct quicki2c_ddata {
> u32 max_detect_size;
> - u32 interrupt_delay;
> + u32 max_interrupt_delay;
> };
>
> struct device;
> @@ -170,6 +181,10 @@ struct acpi_device;
> * @report_len: The length of input/output report packet
> * @reset_ack_wq: Workqueue for waiting reset response from device
> * @reset_ack: Indicate reset response received or not
> + * @i2c_max_frame_size_enable: Indicate max frame size feature
> enabled or not
> + * @i2c_max_frame_size: Max RX frame size (unit in Bytes)
> + * @i2c_int_delay_enable: Indicate interrupt delay feature enabled
> or not
> + * @i2c_int_delay: Interrupt detection delay value (unit in 10 us)
> */
> struct quicki2c_device {
> struct device *dev;
> @@ -200,6 +215,11 @@ struct quicki2c_device {
>
> wait_queue_head_t reset_ack_wq;
> bool reset_ack;
> +
> + u32 i2c_max_frame_size_enable;
> + u32 i2c_max_frame_size;
> + u32 i2c_int_delay_enable;
> + u32 i2c_int_delay;
> };
>
> #endif /* _QUICKI2C_DEV_H_ */
Powered by blists - more mailing lists