[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <538563.1758648981@warthog.procyon.org.uk>
Date: Tue, 23 Sep 2025 18:36:21 +0100
From: David Howells <dhowells@...hat.com>
To: Eric Biggers <ebiggers@...nel.org>
Cc: dhowells@...hat.com, "Jason A. Donenfeld" <Jason@...c4.com>,
Ard Biesheuvel <ardb@...nel.org>,
Harald Freudenberger <freude@...ux.ibm.com>,
Holger Dengler <dengler@...ux.ibm.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
Stephan Mueller <smueller@...onox.de>, Simo Sorce <simo@...hat.com>,
linux-crypto@...r.kernel.org, linux-s390@...r.kernel.org,
keyrings@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] lib/crypto: Add SHA3-224, SHA3-256, SHA3-384, SHA-512, SHAKE128, SHAKE256
Eric Biggers <ebiggers@...nel.org> wrote:
> > > and that the functions can be called in any context.
> >
> > "Context" as in?
>
> See the "Function context" section of
> Documentation/doc-guide/kernel-doc.rst
Btw, in include/crypto/sha1.h:
/**
* hmac_sha1_update() - Update an HMAC-SHA1 context with message data
* @ctx: the HMAC context to update; must have been initialized
* @data: the message data
* @data_len: the data length in bytes
*
* This can be called any number of times.
*
* Context: Any context.
*/
static inline void hmac_sha1_update(struct hmac_sha1_ctx *ctx,
const u8 *data, size_t data_len)
{
sha1_update(&ctx->sha_ctx, data, data_len);
}
for example, your specification of "Context: Any context." is probably not
correct if FPU/Vector registers are used by optimised assembly as part of the
function. See:
void kernel_fpu_begin_mask(unsigned int kfpu_mask)
{
if (!irqs_disabled())
fpregs_lock();
WARN_ON_FPU(!irq_fpu_usable());
/* Toggle kernel_fpu_allowed to false: */
WARN_ON_FPU(!this_cpu_read(kernel_fpu_allowed));
this_cpu_write(kernel_fpu_allowed, false);
if (!(current->flags & (PF_KTHREAD | PF_USER_WORKER)) &&
!test_thread_flag(TIF_NEED_FPU_LOAD)) {
set_thread_flag(TIF_NEED_FPU_LOAD);
save_fpregs_to_fpstate(x86_task_fpu(current));
}
__cpu_invalidate_fpregs_state();
/* Put sane initial values into the control registers. */
if (likely(kfpu_mask & KFPU_MXCSR) && boot_cpu_has(X86_FEATURE_XMM))
ldmxcsr(MXCSR_DEFAULT);
if (unlikely(kfpu_mask & KFPU_387) && boot_cpu_has(X86_FEATURE_FPU))
asm volatile ("fninit");
}
If you try and access the function in IRQ mode, for example, you'll get a
warning, and if IRQs are not disabled, it will disable BH/preemption.
You also can't use it from inside something else that uses FPU registers.
I suggest something like:
* Context: Arch-dependent: May use the FPU/Vector unit registers.
David.
Powered by blists - more mailing lists