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Message-ID: <aNJIZVGcIoqkpKav@intel.com>
Date: Tue, 23 Sep 2025 15:12:37 +0800
From: Chao Gao <chao.gao@...el.com>
To: Sean Christopherson <seanjc@...gle.com>
CC: Paolo Bonzini <pbonzini@...hat.com>, <kvm@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Tom Lendacky <thomas.lendacky@....com>,
Mathias Krause <minipli@...ecurity.net>, John Allen <john.allen@....com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>, Binbin Wu
<binbin.wu@...ux.intel.com>, Xiaoyao Li <xiaoyao.li@...el.com>, "Maxim
Levitsky" <mlevitsk@...hat.com>, Zhang Yi Z <yi.z.zhang@...ux.intel.com>,
"Xin Li" <xin@...or.com>
Subject: Re: [PATCH v16 46/51] KVM: selftests: Add support for
MSR_IA32_{S,U}_CET to MSRs test
On Fri, Sep 19, 2025 at 03:32:53PM -0700, Sean Christopherson wrote:
>Extend the MSRs test to support {S,U}_CET, which are a bit of a pain to
>handled due to the MSRs existing if IBT *or* SHSTK is supported. To deal
>with Intel's wonderful decision to bundle IBT and SHSTK under CET, track
>the second feature, but skip only RDMSR #GP tests to avoid false failures
>when running on a CPU with only one of IBT or SHSTK (the WRMSR #GP tests
>are still valid since the enable bits are per-feature).
>
>Signed-off-by: Sean Christopherson <seanjc@...gle.com>
Reviewed-by: Chao Gao <chao.gao@...el.com>
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