linux-kernel - Re: [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for ExynosAutov920 SoC

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Message-ID: <649f8e90-d99b-401a-bb0f-ef0cf9c4fe7f@kernel.org>
Date: Tue, 7 Oct 2025 15:29:54 +0900
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Sanghoon Bae <sh86.bae@...sung.com>, robh@...nel.org,
 conor+dt@...nel.org, vkoul@...nel.org, alim.akhtar@...sung.com,
 kishon@...nel.org, m.szyprowski@...sung.com, jh80.chung@...sung.com,
 shradha.t@...sung.com
Cc: krzk+dt@...nel.org, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
 linux-phy@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for
 ExynosAutov920 SoC

On 26/09/2025 16:39, Sanghoon Bae wrote:
> Since the Exynosautov920 SoC uses the Samsung PCIe PHY, add support
> for it in the Exynosautov920 PCIe PHY bindings.
> 
> The Exynosautov920 SoC includes two PHY instances: one for a 4-lane PHY
> and another for a 2-lane PHY. Each PHY can be used by separate
> controllers through the bifurcation option. Therefore, from 2 up to 4
> PCIe controllers can be supported and connected with this PHY driver.


Describe hardware, not driver.

> 
> PCIe lane number is used to distinguish each PHY instance.
> This is required since two PHY instances on ExynosAutov920 is not
> identical.
> On PHY driver code, need to check each instance and different settings.


Describe hardware, not driver.

> 
> Signed-off-by: Sanghoon Bae <sh86.bae@...sung.com>
> ---
>  .../bindings/phy/samsung,exynos-pcie-phy.yaml      | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> index 6295472696db..1e8b88d2cd56 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> @@ -19,6 +19,7 @@ properties:
>        - samsung,exynos5433-pcie-phy
>        - tesla,fsd-pcie-phy0
>        - tesla,fsd-pcie-phy1
> +      - samsung,exynosautov920-pcie-phy

Messed order.

>  
>    reg:
>      minItems: 1
> @@ -34,6 +35,10 @@ properties:
>      description: phandle for FSYS sysreg interface, used to control
>                   sysreg registers bits for PCIe PHY
>  
> +  num-lanes:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [2, 4]
> +
>  allOf:
>    - if:
>        properties:
> @@ -42,6 +47,7 @@ allOf:
>              enum:
>                - tesla,fsd-pcie-phy0
>                - tesla,fsd-pcie-phy1
> +              - samsung,exynosautov920-pcie-phy

Messed order.

Best regards,
Krzysztof