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Message-ID: <CAJF2gTQX+7sUU5mwO_VW1evTCTVR6bvVNuEXzgTuW3WB5w7e3Q@mail.gmail.com>
Date: Wed, 15 Oct 2025 09:09:37 +0800
From: Guo Ren <guoren@...nel.org>
To: Yao Zi <ziyao@...root.org>
Cc: Drew Fustini <fustini@...nel.org>, Fu Wei <wefu@...hat.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
Michal Wilczynski <m.wilczynski@...sung.com>, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Icenowy Zheng <uwu@...nowy.me>, Han Gao <rabenda.cn@...il.com>, Han Gao <gaohan@...as.ac.cn>
Subject: Re: [PATCH v3 1/5] dt-bindings: reset: thead,th1520-reset: Remove
non-VO-subsystem resets
On Tue, Oct 14, 2025 at 9:11 PM Yao Zi <ziyao@...root.org> wrote:
>
> Registers in control of TH1520_RESET_ID_{NPU,WDT0,WDT1} belong to AP
> reset controller, not the VO one which is documented as
> "thead,th1520-reset" and is the only reset controller supported for
> TH1520 for now.
>
> Let's remove the IDs, leaving them to be implemented by AP-subsystem
> reset controller in the future.
LGTM.
Acked-by: Guo Ren <guoren@...nel.org>
>
> Fixes: 30e7573babdc ("dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller")
> Signed-off-by: Yao Zi <ziyao@...root.org>
> Acked-by: Rob Herring (Arm) <robh@...nel.org>
> ---
> include/dt-bindings/reset/thead,th1520-reset.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/include/dt-bindings/reset/thead,th1520-reset.h b/include/dt-bindings/reset/thead,th1520-reset.h
> index ee799286c175..e51d6314d131 100644
> --- a/include/dt-bindings/reset/thead,th1520-reset.h
> +++ b/include/dt-bindings/reset/thead,th1520-reset.h
> @@ -9,9 +9,6 @@
>
> #define TH1520_RESET_ID_GPU 0
> #define TH1520_RESET_ID_GPU_CLKGEN 1
> -#define TH1520_RESET_ID_NPU 2
> -#define TH1520_RESET_ID_WDT0 3
> -#define TH1520_RESET_ID_WDT1 4
> #define TH1520_RESET_ID_DPU_AHB 5
> #define TH1520_RESET_ID_DPU_AXI 6
> #define TH1520_RESET_ID_DPU_CORE 7
> --
> 2.50.1
>
--
Best Regards
Guo Ren
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